The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Apr. 04, 2019
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Tetsuo Fukushi, Tokyo, JP;

Hiroyuki Takahashi, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 7/10 (2006.01); G11C 8/06 (2006.01); G11C 7/06 (2006.01);
U.S. Cl.
CPC ...
G11C 5/06 (2013.01); G11C 7/06 (2013.01); G11C 7/1087 (2013.01); G11C 7/1096 (2013.01); G11C 8/06 (2013.01);
Abstract

The subject in the past is that there are a large number of data wirings in a semiconductor device including multiple memory cell arrays and that the area occupied by the data wirings is large. In a selected memory cell array among multiple memory cell arrays, a data wiring functions as a local wiring that transmits the data of the selected memory cell. In a memory cell array that is not selected among the memory cell arrays and is located between a data circuit and the selected memory cell array, the data wiring functions as a global wiring that transmits the data of a memory cell of the selected memory cell array.


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