The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Jan. 13, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Tetsuo Fukushi, Tokyo, JP;

Atsunori Hirobe, Tokyo, JP;

Muneaki Matsushige, Tokyo, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); H01L 23/50 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); G11C 5/02 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G11C 5/025 (2013.01); H01L 23/481 (2013.01); H01L 23/50 (2013.01); H01L 24/17 (2013.01); H01L 25/0657 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/16145 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/1434 (2013.01);
Abstract

A semiconductor device includes a first semiconductor chip located over a substrate; and a second semiconductor chip located over the first semiconductor chip, wherein the first semiconductor chip includes a first internal power supply generation circuit that generates a first internal power supply voltage supplied to a first internal circuit; a first penetration electrode formed from an upper surface of the first semiconductor chip to an underside of the first semiconductor chip and electrically connected to the first internal power supply generation circuit; a first reference voltage generation circuit that generates a first reference voltage; and a second penetration electrode formed from the upper surface of the first semiconductor chip to the underside of the first semiconductor chip and electrically connected to the first reference voltage generation circuit.


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