Teruo Kisu, Legal Representative

Title: Teruo Kisu - Innovator in Semiconductor Technology

Introduction

Teruo Kisu is a prominent inventor and legal representative based in Tokyo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His work focuses on innovative manufacturing methods for semiconductor devices, particularly in the area of MISFET technology.

Latest Patents

Kisu's latest patents include a longitudinal MISFET manufacturing method and a longitudinal MISFET. Additionally, he has developed a semiconductor storage device manufacturing method. One of his notable inventions is a semiconductor memory device that features a vertical MISFET. This device includes a source region, a channel forming region, a drain region, and a gate electrode formed on the sidewall of the channel forming region via a gate insulating film. His method aims to reduce leakage current in the vertical MISFET by counter-doping boron of a conductivity type opposite to that of phosphorus diffused into a poly-crystalline silicon film. This innovation enhances the performance and efficiency of semiconductor memory devices.

Career Highlights

Throughout his career, Teruo Kisu has worked with esteemed companies such as Hitachi, Ltd. and Hitachi ULSI Systems Co., Ltd. His experience in these organizations has allowed him to refine his expertise in semiconductor technology and contribute to various advancements in the field.

Collaborations

Kisu has collaborated with notable colleagues, including Hiroshi Kujirai and Masahiro Moniwa. These partnerships have fostered innovation and development in semiconductor technologies.

Conclusion

Teruo Kisu's contributions to semiconductor technology through his patents and career achievements highlight his role as a key innovator in the industry. His work continues to influence advancements in semiconductor manufacturing methods and devices.