Longitudinal misfet manufacturing method, longitudinal misfet, semiconductor storage device manufacturing method, and semiconductor storage device

Abstract

A semiconductor memory device includes a vertical MISFET having a source region, a channel forming region, a drain region, and a gate electrode formed on a sidewall of the channel forming region via a gate insulating film. In manufacturing the semiconductor memory device, the vertical MISFET in which leakage current (off current) is less can be realized by: counter-doping boron of a conductivity type opposite to that of phosphorus diffused into a poly-crystalline silicon film () constituting the channel forming region from an n type poly-crystalline silicon film () constituting the source region of the vertical MISFET, and the above-mentioned poly-crystalline silicon film (); and reducing an effective impurity concentration in the poly-crystalline silicon film ().