This inventor holds 4 USPTO granted patents and 2 published patent applications. Top assignee: Volantis Semiconductor Inc.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Tapabrata Ghosh and Wafer-Scale Semiconductor Innovation.
Introduction
Tapabrata Ghosh is an inventor based in Oakland, California. His patent work focuses on wafer-scale integration, power delivery, and structural support for semiconductor systems. He is associated with Volantis Semiconductor Inc. The supplied information lists 4 patents.
Latest Patents
Ghosh’s latest patent work includes “Back Side Power Delivery for Wafer-Scale Integration with Solderless Modular Power Substrates.” The disclosed approach connects modular power substrates to the back of a wafer-scale silicon interposer using compression connectors and force from a unified control board. Power converters on the board deliver DC power through the substrates and through-silicon vias to functional chips bonded to the interposer.
Another listed patent is “Wafer-Scale Integration with a Stiffening Isometric Grid Array.” This design uses an isometric grid array to stiffen a wafer-scale silicon interposer while leaving its back side accessible through open recesses. Modular power substrates can be attached through those recesses and connected to a unified control board, which supplies power to the functional chips through the substrates and through-silicon vias.
Career Highlights
The described inventions address practical challenges in wafer-scale semiconductor systems, including mechanical support and power distribution. Their designs combine interposers, through-silicon vias, modular power substrates, and control-board power converters.
Collaborations
Ghosh is associated with Volantis Semiconductor Inc. The supplied information also identifies Kevin Nan Lam as a coworker.
Conclusion
Tapabrata Ghosh’s listed patent work centers on enabling supported, modular, and efficient power delivery for wafer-scale semiconductor integration.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile