The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2026
Filed:
Dec. 12, 2024
Volantis Semiconductor, Inc., Portland, OR (US);
Kevin Nan Lam, Pleasanton, CA (US);
Tapabrata Ghosh, Oakland, CA (US);
Volantis Semiconductor, Inc., Portland, OR (US);
Abstract
Techniques for stiffening are disclosed. A wafer-scale silicon interposer (WSSI) is accessed. A front side of the WSSI is bonded to a plurality of functional chips. The WSSI includes a plurality of through-silicon vias (TSVs). The WSSI is stiffened. The stiffening is based on an isometric grid array (IGA). The stiffening includes inserting, into the IGA, a back side of the WSSI. The back side of the WSSI remains accessible via open recesses within the IGA. Modular power substrates (MPSs) are attached to the back side of the WSSI through the open recesses within the IGA. The MPSs are mechanically connected to a unified control board (UCB). The UCB includes a plurality of DC-to-DC power converters. The UCB sends DC power to the functional chips bonded to the WSSI that was stiffened. The sending is based on the plurality of MPSs and the plurality of TSVs.