The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2026
Filed:
Feb. 18, 2025
Volantis Semiconductor, Inc., Portland, OR (US);
Kevin Nan Lam, Pleasanton, CA (US);
Tapabrata Ghosh, San Francisco, CA (US);
Volantis Semiconductor, Inc., Portland, OR (US);
Abstract
Disclosed techniques enable back side power delivery for wafer-scale integration with an isometric grid compression plate. A wafer-scale integration interposer (WSII) is accessed. A front side of the WSII is bonded to functional chips. The WSII includes through-silicon vias (TSVs). Modular power substrates (MPSs) are attached to a back side of the WSII, based on conductive connecting materials. The attaching includes compressing, by an isometric grid array (IGA), each conductive connecting material. The attaching couples each MPS to one or more functional chips. The MPSs are mechanically connected to a unified control board (UCB) based on a plurality of high power sockets. The UCB includes a plurality of DC-to-DC power converters. DC power is sent, by the UCB, to the plurality of functional chips. The sending is based on the plurality of DC-to-DC power converters, the plurality of MPSs, and the plurality of TSVs.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile