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For the Inventor, By the Inventor

Yokohama, Japan

Takuya Fujimoto

USPTO Granted Patents = 10

Average Co-Inventor Count = 2.5

ph-index = 6

Forward Citations = 81(Granted Patents)


Location History:

  • Kawasaki, JP (1990 - 1997)
  • Kanagawa-ken, JP (2006)
  • Yokohama, JP (1989 - 2008)

Company Filing History:

goldMedal10 out of 52,711 
 
Kabushiki Kaisha Toshiba
 patents

Years Active: 1989-2008

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10 patents (USPTO):Explore Patents
1. 7342843 - Semiconductor integrated circuit device (2008-03-11),
2. 7280407 - Semiconductor memory device including floating gates and control gates, control method for the same, and memory card including the same (2007-10-09),
3. 7245530 - Semiconductor memory device with MOS transistors, each including floating gate and control gate, and memory card including the same (2007-07-17),
4. 7158413 - Semiconductor memory device with MOS transistors, each including a floating gate and a control gate, a control method thereof, and a memory card including the same (2007-01-02),
5. 7099210 - Semiconductor memory device having memory cells with floating gates and memory cell threshold voltage control method (2006-08-29),
6. 7095662 - Semiconductor memory device having first and second memory cell arrays and a program method thereof (2006-08-22),
7. 5675279 - Voltage stepup circuit for integrated semiconductor circuits (1997-10-07),
8. 4995002 - Semiconductor memory device (1991-02-19),
9. 4918408 - Oscillation circuit (1990-04-17),
10. 4806789 - Power select circuit (1989-02-21),

Title: Takuya Fujimoto: Innovator in Semiconductor Technology

Introduction

Takuya Fujimoto is a prominent inventor based in Yokohama, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 10 patents. His work focuses on innovative semiconductor integrated circuit devices and memory systems.

Latest Patents

Fujimoto's latest patents include a semiconductor integrated circuit device that features a semiconductor memory circuit. This circuit comprises a memory cell array with integrated normal cells and a fuse circuit containing fuse cells that store operational information. The fuse cell utilizes a 2-transistor type memory cell, which includes a cell transistor with a charge storage layer and a selection transistor. Another notable patent is for a semiconductor memory device that includes floating gates and control gates. This device features a memory cell array, word lines, and a charge pump circuit that generates voltage during write and erase operations.

Career Highlights

Takuya Fujimoto is currently employed at Kabushiki Kaisha Toshiba, where he continues to develop cutting-edge technologies in semiconductor devices. His expertise in this area has led to advancements that enhance the performance and efficiency of memory systems.

Collaborations

Fujimoto has collaborated with notable colleagues, including Yoshiharu Hirata and Kazuhisa Sakihama. Their combined efforts have contributed to the success of various projects within the semiconductor industry.

Conclusion

Takuya Fujimoto's innovative work in semiconductor technology has established him as a key figure in the field. His patents reflect a commitment to advancing memory systems and integrated circuits, making a lasting impact on the industry.

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