San Jose, CA, United States of America

Takehito Koshizawa

This inventor holds 26 USPTO granted patents and 4 published patent applications, primarily in Semiconductor Fabrication. Top assignee: Applied Materials, Inc.. Active years: 2016-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Takehito Koshizawa. Retrieved from https://idiyas.com/inventor/takehito-koshizawa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 26 

% Patents Active = 100.0

Average Co-Inventor Count = 4.7

ph-index = 4

Forward Citations = 167(Granted Patents)


Company Filing History:


Years Active: 2016-2025

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Areas of Expertise:
Pulsed Plasma Deposition
High Quality Carbon Films
3D NAND Structures
Boron-Doped Silicon
Germanium Oxide
Defect Free Gap Fill
Carbon Hard Masks
DRAM Patterning
Diffusion Barriers
Silicon Films
Interconnection Structures
Air Gap Process
26 patents (USPTO):Explore Patents

Title: Takehito Koshizawa: Innovating in Semiconductor Technology

Introduction

Takehito Koshizawa is a renowned inventor based in San Jose, CA, with a remarkable collection of 23 patents to his name. His work significantly impacts the semiconductor industry, where innovation is paramount for advancing technologies. Koshizawa's latest patents showcase his expertise in developing methods and materials that enhance semiconductor processing.

Latest Patents

One of Koshizawa's latest patents is titled "Defect Free Germanium Oxide Gap Fill." This invention discloses methods for forming defect-free gap fill materials comprising germanium oxide. The process involves depositing the gap fill material by simultaneously exposing a substrate surface to a germane precursor and an oxidant, which may be flowed intermittently. Additionally, the substrate can be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material. The patent also outlines a method for the removal of germanium oxide.

Another notable patent is "Method for Forming and Patterning a Layer and/or Substrate." This invention describes a technique for creating features essential to semiconductor processing. It involves forming a first and a second mandrel on a substrate, with a first spacer along the first mandrel's sidewall and a second spacer along the second mandrel's sidewall. The gap created between the spacers is filled with a gap-filling material, which may include a doped silicon material.

Career Highlights

Koshizawa is currently affiliated with Applied Materials, Inc., a leading company in materials engineering solutions for the semiconductor sector. His innovative contributions have played a crucial role in enhancing semiconductor manufacturing processes, making them more efficient and effective.

Collaborations

Throughout his career, Koshizawa has collaborated with esteemed colleagues, including Abhijit Basu Mallick and Eswaranand Venkatasubramanian. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and enhances the innovative process.

Conclusion

In conclusion, Takehito Koshizawa stands out as a significant figure in semiconductor innovation. With his extensive patent portfolio and ongoing contributions to the field, he continues to influence the development of advanced materials and processes essential for the growth of technology. His work at Applied Materials, Inc. and collaborations with fellow engineers underscore the importance of teamwork in driving innovation in the semiconductor industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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