South Hero, VT, United States of America

Tad Jeffrey Wilder

USPTO Granted Patents = 32 (Patent Applications = 2)

Average Co-Inventor Count = 5.7

ph-index = 6

Forward Citations = 87(Granted Patents)

Location History:

So. Hero, VT (US) (2000)
Essex Junction, VT (US) (2019)
South Hero, VT (US) (2007 - 2020)

Company Filing History:

26 out of 164,108

International Business Machines Corporation

Years Active: 2000-2020

where 'Filed Patents' based on already Granted Patents

32 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 10539611 - Integrated circuit chip reliability qualification using a sample-specific expected fail rate (2020-01-21),

2. 10216870 - Methodology to prevent metal lines from current pulse damage (2019-02-26),

3. 10169500 - Critical path delay prediction (2019-01-01),

4. 10006964 - Chip performance monitoring system and method (2018-06-26),

5. 9940430 - Burn-in power performance optimization (2018-04-10),

6. 9891275 - Integrated circuit chip reliability qualification using a sample-specific expected fail rate (2018-02-13),

7. 9791502 - On-chip usable life depletion meter and associated method (2017-10-17),

8. 9639645 - Integrated circuit chip reliability using reliability-optimized failure mechanism targeting (2017-05-02),

9. 9625325 - System and method for identifying operating temperatures and modifying of integrated circuits (2017-04-18),

10. 9618566 - Systems and methods to prevent incorporation of a used integrated circuit chip into a product (2017-04-11),

11. 9489482 - Reliability-optimized selective voltage binning (2016-11-08),

12. 9383766 - Chip performance monitoring system and method (2016-07-05),

13. 9188643 - Flexible performance screen ring oscillator within a scan chain (2015-11-17),

14. 9157956 - Adaptive power control using timing canonicals (2015-10-13),

15. 9128151 - Performance screen ring oscillator formed from paired scan chains (2015-09-08),

Title: Tad Jeffrey Wilder: Innovator in Integrated Circuit Reliability

Introduction

Tad Jeffrey Wilder, based in South Hero, VT, is an accomplished inventor known for his significant contributions to the field of integrated circuit (IC) reliability. With an impressive portfolio of 32 patents, Wilder has developed methodologies that enhance the performance and durability of IC chips in various applications.

Latest Patents

Wilder's innovations are highlighted by his latest patents, which include:

1. **Integrated Circuit Chip Reliability Qualification Using a Sample-Specific Expected Fail Rate**

This patent addresses a method for performing reliability qualifications on manufactured IC chips. The process involves sorting chips into groups according to their design and process characteristics. By determining group fail rates, the method allows for the qualification of chips based on sample-specific expected fail rates rather than a generic average, ensuring a more accurate assessment of reliability.

2. **Methodology to Prevent Metal Lines from Current Pulse Damage**

This invention presents a computer-implemented method aimed at protecting metal connections within circuit designs from damage caused by current pulses. By analyzing circuit designs and evaluating peak currents against predetermined thresholds, improvements can be made to the circuit to enhance its durability and performance.

Career Highlights

Throughout his career, Tad Wilder has made a meaningful impact while working at recognized companies such as International Business Machines Corporation (IBM) and Globalfoundries Inc. His influence in the industry is reflected in his innovative work and the patents he has secured.

Collaborations

Wilder has collaborated with notable professionals in his field, including Clarence Rosser Ogilvie and David W. Milton. These partnerships have likely contributed to the sophistication and success of his inventions, fostering an environment of innovation.

Conclusion

Tad Jeffrey Wilder's contributions to the world of integrated circuit reliability continue to influence advancements in technology. His innovative approaches to reliability qualification and circuit protection demonstrate a commitment to improving electronic design standards, ensuring that his work will be relevant for years to come.

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2 patents pending:

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