Steven G Rothweiler

Title: Innovations by Steven G Rothweiler

Introduction

Steven G Rothweiler is a notable inventor based in Kunkletown, PA (US). He has made significant contributions to the field of electrical engineering, particularly in the area of VLSI circuit testing. With a total of 3 patents to his name, Rothweiler's work has had a considerable impact on the efficiency of test generation algorithms.

Latest Patents

One of Rothweiler's latest patents is titled "Deriving signal constraints to accelerate sequential test generation." This innovative method significantly accelerates sequential test generation algorithms by accurately computing signal constraints for large sequential circuits. The technique is based on three key ideas: first, it computes line probabilities by allowing signals to assume values other than 0 or 1; second, it employs line justification techniques to update these probabilities; and third, it uses symbolic simulation iteratively to refine the set of values that a signal can assume. This method results in a reduction of more than 50% in test generation time without compromising fault coverage.

Another important patent is focused on "Testing and removal of redundancies in VLSI circuits with non-boolean." This patent outlines techniques for generating tests to detect specified faults in circuits that include non-Boolean components. The main features of this patent include using only one Boolean variable to represent signal values, separating the function of non-Boolean components into Boolean and non-Boolean states, and deriving energy functions solely for the Boolean state while implicitly considering non-Boolean states in the energy minimization procedure.

Career Highlights

Rothweiler is currently employed at NEC USA, Inc., where he continues to innovate and contribute to advancements in circuit testing technologies. His work has been instrumental in improving the efficiency and effectiveness of testing methodologies in the industry.

Collaborations

Throughout his career, Rothweiler has collaborated with esteemed colleagues such as Srimat T Chakradhar and Sujit Dey. These collaborations have further enriched his research and development efforts.

Conclusion

Steven G Rothweiler's contributions to the field of electrical engineering, particularly in VLSI circuit testing, demonstrate his innovative spirit and commitment to advancing technology. His patents reflect a deep understanding of complex systems and a dedication to improving testing processes.