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For the Inventor, By the Inventor

Beaverton, OR, United States of America

Stalinselvaraj Jeyasingh

This inventor holds 36 USPTO granted patents and 1 published patent application and 1 EPO patent, primarily in Virtual Machine Technology. Top assignee: Intel Corporation. Active years: 2005-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Stalinselvaraj Jeyasingh. Retrieved from https://idiyas.com/inventor/stalinselvaraj-jeyasingh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 36 

% Patents Active = 50.0

 

Average Co-Inventor Count = 7.9

ph-index = 17

Forward Citations = 835(Granted Patents)


Location History:

  • Portland, OR (US) (2005 - 2021)
  • Beaverton, OR (US) (2007 - 2023)

Company Filing History:

goldMedal36 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2005-2023

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Areas of Expertise:
Virtual Machine Monitor
Resource Optimization
Secure Application Execution
Translation Lookaside Buffer
Processor Management
Hardware Interrupts
Fault Handling
Machine State Management
Nested Fault Support
Event Window Recognition
Power Management
Chipset Support
36 patents (USPTO):Explore Patents
1. 11573845 - Remote debug for scaled computing environments (2023-02-07),
2. 11016833 - Remote debug for scaled computing environments (2021-05-25),
3. 10885202 - Method and apparatus to provide secure application execution (2021-01-05),
4. 10102380 - Method and apparatus to provide secure application execution (2018-10-16),
5. 9971615 - Optimizing processor-managed resources based on the behavior of a virtual machine monitor (2018-05-15),
6. 9898307 - Starting application processors of a virtual machine (2018-02-20),
7. 9087200 - Method and apparatus to provide secure application execution (2015-07-21),
8. 8751752 - Invalidating translation lookaside buffer entries in a virtual machine system (2014-06-10),
9. 8561068 - Optimizing processor-managed resources based on the behavior of a virtual machine monitor (2013-10-15),
10. 8543772 - Invalidating translation lookaside buffer entries in a virtual machine (VM) system (2013-09-24),
11. 8079034 - Optimizing processor-managed resources based on the behavior of a virtual machine monitor (2011-12-13),
12. 7886293 - Optimizing system behavior in a virtual machine environment (2011-02-08),
13. 7865670 - Invalidating translation lookaside buffer entries in a virtual machine (VM) system (2011-01-04),
14. 7861245 - Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment (2010-12-28),
15. 7818808 - Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor (2010-10-19),

Title: The Inventor Profile of Stalinselvaraj Jeyasingh

Introduction: Stalinselvaraj Jeyasingh is a prolific inventor based in Beaverton, Oregon. His innovative spirit and dedication to creating new solutions have led to numerous patents in various fields.

Latest Patents: Stalinselvaraj Jeyasingh holds several recent patents in the areas of technology and engineering, showcasing his ongoing commitment to pushing the boundaries of innovation.

Career Highlights: With a background in engineering, Stalinselvaraj Jeyasingh has had a successful career marked by groundbreaking inventions that have made a significant impact in their respective industries.

Collaborations: Throughout his career, Stalinselvaraj Jeyasingh has collaborated with leading researchers, engineers, and companies to bring his inventions to life, fostering a culture of innovation and excellence.

Conclusion: Stalinselvaraj Jeyasingh's contributions to the world of inventions and patents continue to inspire future generations of innovators, solidifying his legacy as a pioneering inventor in Beaverton, Oregon.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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