Intel Corporation

Alibaba Group Holding Limited

Stalinselvaraj Jeyasingh

Gilbert A Neiger

Richard A Uhlig

Erik C Cota-Robles

Alain Kagi

Andrew V Anderson

Steven M Bennett

Michael A Kozuch

Sebastian Schoenberg

Stephen T Chou

Alain Kägi

Scott Dion Rodgers

Dion Rodgers

Lawrence O Smith

Michael A Goldsmith

Xiang Chris Zou

Steve M Bennett

David M Durham

Uday R Savagaonkar

Carlos V Rozas

Prashant Dewan

Francis X Mckeen

Vincent R Scarlata

John I Garney

Ernie F Brickell

Simon P Johnson

Howard C Herbert

Gary L Graunke

Stephen R Van Doren

Joseph Frank Cihula

Stephen J Tolopka

Asher M Altman

Bernard Lint

Don Alan Van Dyke

Jiang Tao Li

Jason W Brandt

Sanjoy K Mondal

Subhankar Panda

David A Locklear

Steven A Filary

Christopher J Stedman

Eric C Cota-Robles

Carlos Vallin

Vincent J Zimmer

Michael A Rothman

Andrew F Glew

Rajesh Sankaran Madukkarumukumana

Rajesh S Parthasarathy

Gaurav Khanna

Arumugam Thiyagarajah

Larry O Smith

Andy Glew

Erich Boleyn

Lawrence Smith, Iii

Sohil Mehta

Mukesh J Jagasia

Andrew Anderson

Erik Cota-Robles

Techniques and apparatus for remotely accessing debugging resources of a target system are described. A target system including physical compute resources, such as, processors and a chipset can be coupled to a controller remotely accessible over a network. The controller can be arranged to facilitate remote access to debug resources of the physical compute resources. The controller can be coupled to debug pin, such as, those of a debug port and arranged to assert control signals on the pins to access debug resources. The controller can also be arranged to exchange information elements with a remote debug host to include indication of debug operations and/or debug results.

Remote debug for scaled computing environments

A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

Method and apparatus to provide secure application execution

In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.

Optimizing processor-managed resources based on the behavior of a virtual machine monitor

Apparatuses, methods and storage medium associated with virtual machine application processor startup, are disclosed herein. In embodiments, an apparatus for computing may include a plurality of processor cores; and a plurality of OS modules of an OS. The OS modules may include a BSP module and an AP module. The BSP module may be configured to write into a storage area a start state of an AP of a VM, while the VM is being started up; and the AP module may be configured to start the AP at the start state, directly in a protected mode of execution without first going through a real mode of execution. Other embodiments may be described and/or claimed.

Starting application processors of a virtual machine

One embodiment of the present invention is a technique to invalidate entries in a translation lookaside buffer (TLB). A TLB in a processor has a plurality of TLB entries. Each TLB entry is associated with a virtual machine extension (VMX) tag word indicating if the associated TLB entry is invalidated according to a processor mode when an invalidation operation is performed. The processor mode is one of execution in a virtual machine (VM) and execution not in a virtual machine. The invalidation operation belongs to a non-empty set of invalidation operations composed of a union of (1) a possibly empty set of operations that invalidate a variable number of TLB entries, (2) a possibly empty set of operations that invalidate exactly one TLB entry, (3) a possibly empty set of operations that invalidate the plurality of TLB entries, (4) a possibly empty set of operations that enable and disable use of virtual memory, and (5) a possibly empty set of operations that configure physical address size, page size or other virtual memory system behavior in a manner that changes the manner in which a physical machine interprets the TLB entries.

Invalidating translation lookaside buffer entries in a virtual machine system

One embodiment of the present invention is a technique to invalidate entries in a translation lookaside buffer (TLB). A TLB in a processor has a plurality of TLB entries. Each TLB entry is associated with a virtual machine extension (VMX) tag word indicating if the associated TLB entry is invalidated according to a processor mode when an invalidation operation is performed. The processor mode is one of execution in a virtual machine (VM) and execution not in a virtual machine. The invalidation operation belongs to a non-empty set of invalidation operations composed of a union of () a possibly empty set of operations that invalidate a variable number of TLB entries, () a possibly empty set of operations that invalidate exactly one TLB entry, () a possibly empty set of operations that invalidate the plurality of TLB entries, () a possibly empty set of operations that enable and disable use of virtual memory, and () a possibly empty set of operations that configure physical address size, page size or other virtual memory system behavior in a manner that changes the manner in which a physical machine interprets the TLB entries.

Invalidating translation lookaside buffer entries in a virtual machine (VM) system

In one embodiment, the present invention includes a method of transitioning control to guest software in a virtual machine from a virtual machine monitor, receiving control following a transition from the virtual machine to the virtual machine monitor upon an event, and determining whether to modify a state of the guest code, a state of the virtual machine monitor or a state of controls. If such a determination is made, the state may be modified and control is transitioned back to the guest software.

Optimizing system behavior in a virtual machine environment

In one embodiment, a method includes transitioning control to a virtual machine (VM) upon receiving a request from a virtual machine monitor (VMM), determining that the request to transition control is associated with a request to be informed of an open event window, performing an event window check to determine whether an even window of the VM is open, and transitioning control to the VMM if the event window check indicates that the event window of the VM is open.

Method and apparatus for facilitating recognition of an open event window during operation of guest software in a virtual machine environment

In one embodiment, a processor mode is provided for guest software. The processor mode enables the guest software to operate at a privilege level intended by the guest software. When the guest software attempts to perform an operation restricted by the processor mode, the processor mode is exited to transfer control over the operation to a virtual-machine monitor, which runs outside this processor mode.

Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor

Growing community of inventors

Beaverton, OR, United States of America

Stalinselvaraj Jeyasingh