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For the Inventor, By the Inventor

San Jose, CA, United States of America

Sinjeet Parekh

This inventor holds 10 USPTO granted patents and 2 published patent applications and 1 EPO patent. Top assignee: Texas Instruments Corporation. Active years: 2019-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sinjeet Parekh. Retrieved from https://idiyas.com/inventor/sinjeet-parekh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 10 

% Patents Active = 100.0

 

Average Co-Inventor Count = 3.2

ph-index = 4

Forward Citations = 30(Granted Patents)


Company Filing History:

goldMedal10 out of 29,901 
 
Texas Instruments Corporation
 patents

Years Active: 2019-2023

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10 patents (USPTO):Explore Patents
1. 11736313 - Common bus data flow for serially chained devices (2023-08-22),
2. 11171804 - Common bus data flow for serially chained devices (2021-11-09),
3. 10868550 - Cycle slip detection and correction in phase-locked loop (2020-12-15),
4. 10727846 - Phase cancellation in a phase-locked loop (2020-07-28),
5. 10691074 - Time-to-digital converter circuit (2020-06-23),
6. 10686456 - Cycle slip detection and correction in phase-locked loop (2020-06-16),
7. 10505555 - Crystal oscillator offset trim in a phase-locked loop (2019-12-10),
8. 10498344 - Phase cancellation in a phase-locked loop (2019-12-03),
9. 10496041 - Time-to-digital converter circuit (2019-12-03),
10. 10491222 - Switch between input reference clocks of different frequencies in a phase locked loop (PLL) without phase impact (2019-11-26),

Title: Innovator Spotlight: Sinjeet Parekh

Introduction: Sinjeet Parekh is a prominent inventor based in San Jose, California, recognized for his substantial contributions to technology, with a remarkable portfolio of 10 patents. His innovative work primarily focuses on the development and enhancement of circuit designs and data flow systems.

Latest Patents: Among his latest notable patents is the "Common bus data flow for serially chained devices." This invention details a sophisticated circuit design that incorporates a system bus controller. The controller is adept at generating downstream frames in response to local bus transmissions. It further constructs a downstream aggregate frame by combining multiple transmissions, which allows for efficient data handling and transmission at the first downstream port. This advanced configuration enhances communication between devices, ensuring seamless operation in data-centric environments.

Career Highlights: Sinjeet Parekh has built an impressive career with Texas Instruments Corporation, where he applies his expertise in electronic systems and circuit design. His significant contributions have impacted the field of integrated circuits, inspiring new methodologies for data flow management.

Collaborations: Throughout his career, Sinjeet has collaborated with various talented individuals, including coworkers Jayawardan Janardhanan and Christopher Andrew Schell. These partnerships have facilitated the exchange of ideas and knowledge, leading to innovative solutions and advancements in technology.

Conclusion: Sinjeet Parekh's impactful innovations and patents highlight his commitment to technological advancement. With a strong foundation in circuit design and data flow systems, his work continues to inspire future innovations in the tech industry, establishing him as a key figure in the landscape of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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