The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
Dec. 20, 2018
Texas Instruments Incorporated, Dallas, TX (US);
Sinjeet Dhanvantray Parekh, San Jose, CA (US);
Jayawardan Janardhanan, Issaquah, WA (US);
Christopher Andrew Schell, Tacoma, WA (US);
Arvind Sridhar, Issaquah, WA (US);
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Abstract
A phase-locked loop (PLL) includes a time-to-digital converter (TDC) to receive a reference clock. The PLL also includes a digital loop filter coupled to the TDC. The digital loop filter repeatedly generates frequency control words. An analog phase-locked loop (APLL) includes a programmable frequency divider. A non-volatile memory device stores a value from the digital loop filter. The PLL includes a free-run control circuit. Upon a power-on reset process, the free-run circuit retrieves the value from the non-volatile memory to adjust a divide ratio of the programmable frequency divider based on the retrieved value. Upon a reference clock provided to the TDC, the free-run control circuit continues to adjust the divide ratio of the programmable frequency divider based on both the retrieved value from the non-volatile memory and a current frequency control word from the digital loop filter.