IDiyas

For the Inventor, By the Inventor

Petaling Jaya, Malaysia

Shyue Fong Quek

USPTO Granted Patents = 31

Average Co-Inventor Count = 4.2

ph-index = 12

Forward Citations = 533(Granted Patents)


Location History:

  • Jaya, MY (2001)
  • Petaline Jaya, MY (2002)
  • Petaling Jaya, ML (2002 - 2003)
  • Petaling Jaya, MY (2000 - 2005)
  • Singapore, SG (2002 - 2015)

Company Filing History:

goldMedal29 out of 962 
 
Chartered Semiconductor Manufacturing Ltd (corporation)
 patents
silverMedal2 out of 1,016 
 
Globalfoundries Singapore Pte. Ltd.
 patents

Years Active: 2000-2015

where 'Filed Patents' based on already Granted Patents

31 patents (USPTO):
1. 9064084 - Topography driven OPC and lithography flow (2015-06-23),
2. 8898597 - Etch failure prediction based on wafer resist top loss (2014-11-25),
3. 6963113 - Method of body contact for SOI MOSFET (2005-11-08),
4. 6803314 - Double-layered low dielectric constant dielectric dual damascene method (2004-10-12),
5. 6787422 - Method of body contact for SOI mosfet (2004-09-07),
6. 6764914 - Method of forming a high K metallic dielectric layer (2004-07-20),
7. 6653674 - Vertical source/drain contact semiconductor (2003-11-25),
8. 6611024 - Method of forming PID protection diode for SOI wafer (2003-08-26),
9. 6582856 - Simplified method of fabricating a rim phase shift mask (2003-06-24),
10. 6492726 - Chip scale packaging with multi-layer flip chip arrangement and ball grid array interconnection (2002-12-10),
11. 6486515 - ESD protection network used for SOI technology (2002-11-26),
12. 6465296 - Vertical source/drain contact semiconductor (2002-10-15),
13. 6455384 - Method for forming MOSFET device having source/drain extension regions located underlying L shaped spacers (2002-09-24),
14. 6416909 - Alternating phase shift mask and method for fabricating the alignment monitor (2002-07-09),
15. 6406994 - Triple-layered low dielectric constant dielectric dual damascene approach (2002-06-18),

Title: Innovations and Contributions of Shyue Fong Quek

Introduction: Shyue Fong Quek is an esteemed inventor based in Petaling Jaya, Malaysia, known for his remarkable contributions to the field of integrated circuit technology. With an impressive portfolio of 31 patents, he has made significant advancements that enhance the manufacturing processes and reliability of integrated circuits.

Latest Patents: Among his recent innovations are two notable patents. The first patent focuses on "Topography Driven Optical Proximity Correction and Lithography Flow," which introduces enhancements in lithography for forming integrated circuits. This innovation includes a comprehensive analysis of design data files to extract accumulative topography information across various mask levels. Such information is fundamental in facilitating topography-driven optical proximity correction and lithography techniques.

The second patent addresses "Etch Failure Prediction Based on Wafer Resist Top Loss," providing a methodology and apparatus for simulating the integrity of circuit designs. This process enables predictions regarding manufacturability by considering design latitude while minimizing the need for extensive turnaround times or highly skilled engineers. The embodiment outlines a series of steps, including determining features of an IC design and assessing resist layer thickness through analysis of aerial images.

Career Highlights: Shyue Fong Quek has held key positions at leading semiconductor companies, notably at Chartered Semiconductor Manufacturing Ltd and Globalfoundries Singapore Pte. Ltd. His expertise in integrated circuit technology and innovative approach has earned him recognition in the industry.

Collaborations: Throughout his career, Shyue Fong has collaborated with talented individuals, including coworkers Ting Cheong Ang and Sang Yee Loong. These collaborations have further fueled innovation and have led to numerous advancements in semiconductor research and development.

Conclusion: Ultimately, Shyue Fong Quek's contributions to integrated circuit technology through his patents and collaborations demonstrate his commitment to advancing the semiconductor industry. His innovative spirit and technical expertise continue to inspire future developments in the field, promising enhanced efficiencies in manufacturing processes and improved circuit reliability.

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