Osaka, Japan

Shouzou Hirano


Average Co-Inventor Count = 4.6

ph-index = 6

Forward Citations = 53(Granted Patents)


Location History:

  • Ibaraki, JP (2004)
  • Osaka, JP (2004 - 2009)

Company Filing History:


Years Active: 2004-2009

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7 patents (USPTO):Explore Patents

Title: Shouzou Hirano: Innovator in Semiconductor Design

Introduction

Shouzou Hirano is a prominent inventor based in Osaka, Japan. He has made significant contributions to the field of semiconductor integrated circuits, holding a total of 7 patents. His work focuses on optimizing circuit design to enhance performance and efficiency.

Latest Patents

Hirano's latest patents include a method of designing a semiconductor integrated circuit. This innovation allows for higher precision in optimizing the necessary capacitance by considering the IR drop while dynamically assessing the cell activation rate. The process aims to reduce the overall capacitance component needed to suppress voltage fluctuations in power supplies. Additionally, he has developed an operation analyzing method for semiconductor integrated circuit devices. This method involves forming voltage waveform information and calculating delay values based on voltage abstraction information.

Career Highlights

Throughout his career, Shouzou Hirano has worked with notable companies such as Matsushita Electric Industrial Co., Ltd. and Panasonic Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and design.

Collaborations

Hirano has collaborated with several professionals in his field, including Kenji Shimazaki and Hiroyuki Tsujikawa. These partnerships have fostered innovation and advancement in semiconductor design.

Conclusion

Shouzou Hirano's contributions to semiconductor technology through his patents and collaborations highlight his role as a key innovator in the industry. His work continues to influence the design and optimization of integrated circuits, showcasing the importance of innovation in technology.

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