Portland, OR, United States of America

Shivnandan D Kaushik

This inventor holds 50 USPTO granted patents and 6 published patent applications and 2 EPO patents, primarily in Memory Resource Management. Top assignees: Intel Corporation, Ampere Computing LLC. Active years: 2003-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Shivnandan D Kaushik. Retrieved from https://idiyas.com/inventor/shivnandan-d-kaushik

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 50 

% Patents Active = 42.0


Average Co-Inventor Count = 5.6

ph-index = 13

Forward Citations = 551(Granted Patents)

Forward Citations (Not Self Cited) = 537(Dec 10, 2025)


Company Filing History:


Years Active: 2003-2025

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Areas of Expertise:
Memory Resource Partitioning
Firmware Update
Thread Execution
Instruction Set
Inter-Processor Interrupts
Power Management
OS Services
Context State Management
Hot Plug Interface
Queued Locks
Persistent User-Level Thread
Processor Selection
50 patents (USPTO):Explore Patents

Title: Innovations by Shivnandan D Kaushik in Thread Execution Mechanisms

Introduction

Shivnandan D Kaushik, based in Portland, OR, is a prolific inventor with a remarkable portfolio of 46 patents. His contributions focus predominantly on advancements in computing technologies, particularly in the area of thread execution mechanisms.

Latest Patents

Among Shivnandan's latest innovations are two noteworthy patents:

1. **Mechanism for instruction set based thread execution on a plurality of instruction sequencers** – This patent outlines a method for managing user-level threads on a first instruction sequencer. The method responds to executing user-level instructions on a second instruction sequencer, which is under the control of an application-level program. This innovative process enhances the efficiency and effectiveness of thread management in multi-sequencer environments.

2. **Mechanism for instruction set based thread execution of a plurality of instruction sequencers** – Similar to the first, this patent also addresses the management of user-level threads on instruction sequencers, improving the interaction between different sequencers and user-level instructions, further pushing the boundaries of computational efficiency.

Career Highlights

Shivnandan currently works at Intel Corporation, a leading company in semiconductor technology and computing solutions. His career is marked by continuous innovation and a commitment to enhancing computational processes through patent developments.

Collaborations

During his tenure at Intel Corporation, Shivnandan has collaborated with renowned colleagues such as Bryant E Bigbee and James B Crossland. These collaborations foster an environment of innovation, allowing for the cross-pollination of ideas and further advancements in their respective fields.

Conclusion

Shivnandan D Kaushik's contributions to the field of technology are significant, with a focus on optimizing thread execution mechanisms. His patents not only reflect his innovative spirit but also pave the way for future advancements in computing technology. As he continues to collaborate with fellow inventors, his work promises to yield even more groundbreaking inventions in the years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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