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For the Inventor, By the Inventor

Folsom, CA, United States of America

Serafin E Garcia

USPTO Granted Patents = 13

Average Co-Inventor Count = 3.0

ph-index = 8

Forward Citations = 414(Granted Patents)


Company Filing History:

goldMedal13 out of 54,750 
 
Intel Corporation
 patents

Years Active: 2002-2006

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13 patents (USPTO):Explore Patents
1. 7100032 - Method and apparatus for identifying hardware compatibility and enabling stable software images (2006-08-29),
2. 7082480 - Managing bus transaction dependencies (2006-07-25),
3. 7058736 - Reordering of burst data transfers across a host bridge (2006-06-06),
4. 6983339 - Method and apparatus for processing interrupts of a bus (2006-01-03),
5. 6915407 - Method and apparatus for a low latency source-synchronous address receiver for a host system bus in a memory controller (2005-07-05),
6. 6782435 - Device for spatially and temporally reordering for data between a processor, memory and peripherals (2004-08-24),
7. 6748513 - Method and apparatus for a low latency source-synchronous address receiver for a host system bus in a memory controller (2004-06-08),
8. 6694390 - Managing bus transaction dependencies (2004-02-17),
9. 6584526 - Inserting bus inversion scheme in bus path without increased access latency (2003-06-24),
10. 6516375 - Peripheral component interconnect (PCI) configuration emulation for hub interface (2003-02-04),
11. 6505259 - Reordering of burst data transfers across a host bridge (2003-01-07),
12. 6433785 - Method and apparatus for improving processor to graphics device throughput (2002-08-13),
13. 6374317 - Method and apparatus for initializing a computer interface (2002-04-16),

Title: Innovations of Serafin E Garcia: A Pioneer at Intel Corporation

Introduction: Serafin E Garcia is an esteemed inventor based in Folsom, California, recognized for his significant contributions to the field of computer engineering. With a commendable portfolio of 13 patents, Garcia has demonstrated his expertise in developing innovative solutions that enhance hardware compatibility and software efficiency.

Latest Patents: Among Garcia's latest patents are notable innovations such as a "Method and apparatus for identifying hardware compatibility and enabling stable software images." This patent introduces an approach for selecting either the actual stepping revision ID value or a compatible revision ID value, which is crucial for ensuring readability by processors through a revision ID register. Additionally, he has patented "Managing bus transaction dependencies," which incorporates sophisticated techniques to avert deadlocks and livelocks in computer systems. This patent details methods for handling transactions, including the use of a bail-out timer and strategies for managing delayed transactions under specific conditions.

Career Highlights: Garcia's career at Intel Corporation is marked by his focus on creating cutting-edge technologies that drive the future of computing. His innovations are not only pivotal for Intel but also contribute to the broader technology landscape, showcasing his ability to solve complex challenges and improve operational efficiency in computer systems.

Collaborations: Throughout his career, Garcia has collaborated with talented individuals like Zohar Bogin and David J Harriman, further enriching his innovative journey. These partnerships highlight the importance of teamwork in driving successful outcomes and advancing technological frontiers.

Conclusion: In conclusion, Serafin E Garcia's dedication to innovation and his impressive patent portfolio underscore his role as a key contributor to advancements in computer engineering. His work at Intel Corporation continues to influence the industry, paving the way for future developments that enhance both hardware compatibility and software performance.

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