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For the Inventor, By the Inventor

El Dorado Hills, CA, United States of America

Saurabh Sharma

This inventor holds 30 USPTO granted patents and 6 published patent applications, primarily in Graphics Processing. Top assignee: Intel Corporation. Active years: 2016-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Saurabh Sharma. Retrieved from https://idiyas.com/inventor/saurabh-sharma

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30 

% Patents Active = 93.3

Average Co-Inventor Count = 6.1

ph-index = 4

Forward Citations = 27(Granted Patents)


Location History:

  • El Dorado, CA (US) (2017)
  • El Dorado Hills, CA (US) (2016 - 2024)

Company Filing History:

goldMedal30 out of 56,365 
 
Intel Corporation
 patents

Years Active: 2016-2025

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Areas of Expertise:
Tile Sequencing
Rendering Apparatus
3D Workloads
Depth Buffer
Asynchronous Execution
Data Compression
Cache Efficiency
Pixel Hashing
Shading Pipeline
Memory Access
Thread Scheduling
GPU Processing
30 patents (USPTO):Explore Patents
1. 12293462 - Tile sequencing mechanism (2025-05-06),
2. 11900539 - Tile sequencing mechanism (2024-02-13),
3. 11710269 - Position-based rendering apparatus and method for multi-die/GPU graphics processing (2023-07-25),
4. 11640693 - Dynamically enabling tiling in 3D workloads (2023-05-02),
5. 11615584 - Hierarchical depth buffer back annotation (2023-03-28),
6. 11494867 - Asynchronous execution mechanism (2022-11-08),
7. 11403805 - Position-based rendering apparatus and method for multi-die/GPU graphics processing (2022-08-02),
8. 11263720 - Frequent data value compression for graphics processing units (2022-03-01),
9. 11250627 - Tile sequencing mechanism (2022-02-15),
10. 11250539 - Low granularity coarse depth test efficiency enhancement (2022-02-15),
11. 11204801 - Method and apparatus for scheduling thread order to improve cache efficiency (2021-12-21),
12. 11176736 - Dynamically enabling tiling in 3D workloads (2021-11-16),
13. 11080925 - Hierarchical depth buffer back annotation (2021-08-03),
14. 10997771 - Position-based rendering apparatus and method for multi-die/GPU graphics processing (2021-05-04),
15. 10916052 - Dynamically enabling tiling in 3D workloads (2021-02-09),

Title: Inventor Saurabh Sharma: Pioneering Innovations in El Dorado Hills

Introduction: Saurabh Sharma, a distinguished inventor based in El Dorado Hills, CA, is renowned for his groundbreaking contributions to the field of technology and beyond.

Latest Patents: Saurabh Sharma's recent patents include cutting-edge advancements in artificial intelligence, renewable energy solutions, and sustainable agriculture practices.

Career Highlights: With a career spanning over two decades, Sharma has held key roles in various tech companies, leading research and development teams to create disruptive technologies that have reshaped industries.

Collaborations: Sharma has collaborated with top research institutions, universities, and multinational corporations to bring his inventions to life, fostering a culture of innovation and excellence.

Conclusion: Saurabh Sharma's relentless pursuit of innovation and his passion for creating a positive impact on society solidify his position as a visionary inventor shaping the future of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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