The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 2021

Filed:

Nov. 14, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Justin DeCell, San Francisco, CA (US);

Saurabh Sharma, El Dorado Hills, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/52 (2006.01); G06T 15/80 (2011.01); G06F 12/0802 (2016.01); G06F 9/38 (2018.01); G06F 9/30 (2018.01); G06F 9/50 (2006.01); G06T 15/00 (2011.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 9/30145 (2013.01); G06F 9/3877 (2013.01); G06F 12/0802 (2013.01); G06F 9/3009 (2013.01); G06F 9/4806 (2013.01); G06F 9/5038 (2013.01); G06T 15/005 (2013.01); G06T 15/80 (2013.01);
Abstract

Systems and methods for scheduling thread order to improve cache efficiency are disclosed. In one embodiment, a graphics processor includes processing resources and schedule and dispatch logic to schedule and dispatch threads to the processing resources. The schedule and dispatch logic is configured to receive threads, to schedule and dispatch the threads based on a forward thread dispatch having a forward thread order, and to determine whether to disable a reversing of a thread order upon completion of at least a portion of the forward thread dispatch including a completion or ending of a draw call or a dispatch.


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