Elkton, MD, United States of America

Sarah J Lane

This inventor holds 3 USPTO granted patents. Top assignees: Rodel Holdings, Inc., Rohm and Haas Electronic Materials Cmp Holdings, Inc.. Active years: 2003-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sarah J Lane. Retrieved from https://idiyas.com/inventor/sarah-j-lane

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 66.7

Average Co-Inventor Count = 6.4

ph-index = 2

Forward Citations = 18(Granted Patents)


Company Filing History:


Years Active: 2003-2007

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3 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Sarah J Lane

Introduction

Sarah J Lane is a notable inventor based in Elkton, MD (US), recognized for her significant contributions to the field of semiconductor technology. With a total of 3 patents to her name, she has developed innovative methods that enhance the efficiency and effectiveness of chemical mechanical polishing processes.

Latest Patents

One of her latest patents is titled "Multi-step methods for chemical mechanical polishing silicon dioxide and silicon nitride." This invention provides a method for polishing silica and silicon nitride on a semiconductor wafer. The process involves planarizing the silica with a specific aqueous composition and detecting an endpoint to the planarization. Additionally, it includes a second aqueous composition for clearing the silica. Another significant patent is "Composition and method for polishing in metal CMP." This invention focuses on polishing a composite semiconductor structure containing a metal layer, a barrier layer, and an insulating layer. The composition comprises an aqueous medium, an oxidant, and an organic polymer that helps in the polishing process.

Career Highlights

Throughout her career, Sarah has worked with prominent companies in the semiconductor industry, including Rodel Holdings, Inc. and Rohm and Haas Electronic Materials CMP Holdings, Inc. Her work has significantly impacted the development of advanced polishing techniques that are crucial for semiconductor manufacturing.

Collaborations

Sarah has collaborated with several professionals in her field, including Vikas Sachan and Elizabeth A (Kegerise) Langlois. These collaborations have contributed to her innovative approaches and the successful development of her patents.

Conclusion

Sarah J Lane's contributions to semiconductor technology through her patents and career achievements highlight her role as a leading inventor in the industry. Her innovative methods continue to influence the field and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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