Location History:
- Uttar Pradesh, IN (2011)
- New Delhi, IN (2011 - 2012)
- Noida, IN (2013 - 2015)
Company Filing History:
Years Active: 2011-2015
Title: Sandeep Pagey: Innovator in Digital Design Verification
Introduction
Sandeep Pagey is a prominent inventor based in Noida, India. He has made significant contributions to the field of digital design verification, holding a total of 7 patents. His work focuses on improving methods for verifying digital designs, which is crucial in the development of integrated circuits.
Latest Patents
Sandeep's latest patents include innovative methods for simulation-based functional verification. One of his notable inventions is a ranking process for verifying a digital design using a computing device. This method involves determining tests associated with the digital design and generating verification results through multiple verification runs. Additionally, he has developed a configuration-based merging of coverage data results for functional verification of integrated circuits. This method independently executes simulation runs to generate coverage data for various functional blocks, ultimately merging this data into a comprehensive result.
Career Highlights
Sandeep Pagey is currently employed at Cadence Design Systems, Inc., where he continues to advance the field of digital design verification. His expertise and innovative approaches have positioned him as a key player in the industry.
Collaborations
Some of Sandeep's coworkers include Frank Armbruster and Bijaya Kumar Sahu, who contribute to the collaborative environment at Cadence Design Systems, Inc.
Conclusion
Sandeep Pagey's contributions to digital design verification through his patents and work at Cadence Design Systems, Inc. highlight his role as an influential inventor in the technology sector. His innovative methods are paving the way for advancements in integrated circuit design verification.