logo

For the Inventor, By the Inventor

Fremont, CA, United States of America

Sandeep Agarwal

This inventor holds 12 USPTO granted patents and 4 published patent applications. Top assignees: Intersil Americas Inc., Genesis Microchip Corporation, Symantec Corporation. Active years: 2003-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Sandeep Agarwal. Retrieved from https://idiyas.com/inventor/sandeep-agarwal-nrbjh8tn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 12 

% Patents Active = 66.7

Average Co-Inventor Count = 2.0

ph-index = 7

Forward Citations = 187(Granted Patents)


Company Filing History:

goldMedal5 out of 929 
 
Intersil Americas Inc.
 patents
silverMedal2 out of 135 
 
Genesis Microchip Corporation
 patents
bronzeMedal2 out of 3,063 
 
Symantec Corporation
 patents
4. 1 out of 5 
 
Sage, Inc.
 patents
5. 1 out of 535 
 
Veritas Technologies LLC
 patents
6. 1 out of 834,570 
Other
 patents

Years Active: 2003-2020

Loading Chart...
12 patents (USPTO):Explore Patents
1. 10848098 - Smart energy storage system (2020-11-24),
2. 9454444 - Using location tracking of cluster nodes to avoid single points of failure (2016-09-27),
3. 8489721 - Method and apparatus for providing high availabilty to service groups within a datacenter (2013-07-16),
4. 8159276 - Method for using digital PLL in a voltage regulator (2012-04-17),
5. 8108715 - Systems and methods for resolving split-brain scenarios in computer clusters (2012-01-31),
6. 7944192 - Hysteretic power-supply controller with adjustable switching frequency, and related power supply, system, and method (2011-05-17),
7. 7592846 - Method for using digital PLL in a voltage regulator (2009-09-22),
8. 7498852 - Phase error correction circuit for a high speed frequency synthesizer (2009-03-03),
9. 7205798 - Phase error correction circuit for a high speed frequency synthesizer (2007-04-17),
10. 6933937 - Pixel clock PLL frequency and phase optimization in sampling of video signals for high quality image display (2005-08-23),
11. 6735349 - Method and system for dual spatial or temporal scaling (2004-05-11),
12. 6633288 - Pixel clock PLL frequency and phase optimization in sampling of video signals for high quality image display (2003-10-14),

Title: The Innovative Journey of Sandeep Agarwal

Introduction: Sandeep Agarwal, a visionary inventor based in Fremont, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Sandeep Agarwal holds several patents in the areas of artificial intelligence, renewable energy, and biotechnology, showcasing his diverse range of expertise and creativity.

Career Highlights: With a background in engineering and a passion for problem-solving, Sandeep Agarwal has successfully brought several cutting-edge inventions to life, revolutionizing industries and improving lives.

Collaborations: Throughout his career, Sandeep Agarwal has collaborated with leading research institutions, universities, and tech companies to further develop and implement his innovative ideas, demonstrating his commitment to driving progress through teamwork.

Conclusion: Sandeep Agarwal's relentless pursuit of innovation and his dedication to pushing the boundaries of what is possible make him a true trailblazer in the world of inventions. His impact on technology and society is sure to be felt for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…