The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Sep. 22, 2009
Applicants:
Gustavo James Mehas, Sunnyvale, CA (US);
Sandeep Agarwal, Fremont, CA (US);
Jayant Vivrekar, San Jose, CA (US);
Xiaole Chen, San Jose, CA (US);
Inventors:
Gustavo James Mehas, Sunnyvale, CA (US);
Sandeep Agarwal, Fremont, CA (US);
Jayant Vivrekar, San Jose, CA (US);
Xiaole Chen, San Jose, CA (US);
Assignee:
Intersil Americas Inc., Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
A circuit comprises a digital phase locked loop for generating a synchronization signal and a voltage regulator for providing regulated output voltage responsive to the synchronization signal from the digital phase locked loop.