The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2005

Filed:

Aug. 13, 2003
Applicants:

Sandeep Agarwal, Fremont, CA (US);

Arun Johary, San Jose, CA (US);

Inventors:

Sandeep Agarwal, Fremont, CA (US);

Arun Johary, San Jose, CA (US);

Assignee:

Genesis Microchip Inc., Alviso, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G005/00 ;
U.S. Cl.
CPC ...
Abstract

Pixel clock frequency and optimum sampling phase adjustment is an important requirement in Flat panel display monitors (FPDM) with an analog video interface. This invention proposes a new and more advanced method for frequency an optimum sampling phase determination. It is based on analyzing the content of the image to arrive at an optimum value of phase and frequency by directly optimizing image quality. The method differs from exsisting methods on two counts. First, no assumptions are needed about the precise value of expected frequency. Second, instead of following a two step approach of first determining frequency and then phase, this invention makes possible a single pass phase-frequency optimization.


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