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For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Robert G Hathaway

This inventor holds 28 USPTO granted patents and 2 published patent applications and 5 EPO patents, primarily in Data Processing Architectures. Top assignees: Juniper Networks, Inc., Telefonaktiebolaget Lm Ericsson (Publ), Azul Systems, Inc.. Active years: 1999-2024.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert G Hathaway. Retrieved from https://idiyas.com/inventor/robert-g-hathaway

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 28 

% Patents Active = 78.6

 

Average Co-Inventor Count = 3.8

ph-index = 11

Forward Citations = 409(Granted Patents)


Location History:

  • Santa Clara, CA (US) (1999 - 2005)
  • Sunnyvale, CA (US) (2005 - 2020)

Company Filing History:

goldMedal12 out of 4,776 
 
Juniper Networks, Inc.
 patents
silverMedal8 out of 27,119 
 
Telefonaktiebolaget Lm Ericsson (Publ)
 patents
bronzeMedal4 out of 65 
 
Azul Systems, Inc.
 patents
4. 4 out of 56,440 
 
Intel Corporation
 patents

Years Active: 1999-2024

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Areas of Expertise:
Cache Memory
Network Packets
Multiprocessor Systems
Resource Allocation
Content Service Aggregation
Error Correction
Bandwidth Allocation
Instruction Dispatching
Compute Engines
Self-Learning Scheduler
Memory Organization
Digital Processors
28 patents (USPTO):Explore Patents
1. 12160369 - Processor related communications (2024-12-03),
2. 10747457 - Technologies for processing network packets in agent-mesh architectures (2020-08-18),
3. 9419911 - Method and system for packet job scheduler in data processing based on workload self-learning (2016-08-16),
4. 9317289 - Acknowledgement forwarding (2016-04-19),
5. 9311148 - Pseudo-random hardware resource allocation through the plurality of resource controller based on non-repeating sequence of index list entries (2016-04-12),
6. 9083628 - Content service aggregation system (2015-07-14),
7. 8914581 - Method and apparatus for accessing cache memory (2014-12-16),
8. 8700874 - Digital counter segmented into short and long access time memory (2014-04-15),
9. 8656139 - Digital processor for processing long and short pointers and converting each between a common format (2014-02-18),
10. 8402248 - Explicitly regioned memory organization in a network element (2013-03-19),
11. 8370528 - Content service aggregation system (2013-02-05),
12. 8099651 - Subsystem and method for encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use in a 76-bit memory module (2012-01-17),
13. 8051227 - Programmable queue structures for multiprocessors (2011-11-01),
14. 7765328 - Content service aggregation system (2010-07-27),
15. 7398449 - Encoding 64-bit data nibble error correct and cyclic-redundancy code (CRC) address error detect for use on a 76-bit memory module (2008-07-08),

Title: Robert G Hathaway: Innovator in Processor Communications

Introduction

Robert G Hathaway is a prominent inventor based in Santa Clara, CA, known for his extensive contributions to the field of communications and processing technology. With an impressive portfolio of 28 patents, Hathaway has demonstrated a profound ability to innovate and enhance computing processes, particularly in relation to networking and acceleration devices.

Latest Patents

Hathaway's latest patents reflect his focus on advanced processor-related communications. One patent describes a compute device's capability to access both local and remote accelerator devices for processing a received packet. This system allows for high flexibility, as packets can be encapsulated in a second packet that prioritizes processing tasks. The technology facilitates communication between compute devices and remote accelerator devices, informing them about processing efficiency and enhancing overall performance.

Another noteworthy patent focuses on processing network packets within agent-mesh architectures. It details technologies that enable a network interface controller (NIC) to handle received network packets in a distributed manner. By leveraging a memory fabric, the NIC can generate event messages to communicate with packet processors, enabling refined packet processing through identified agents, thereby improving efficiency in network communications.

Career Highlights

Throughout his career, Robert G Hathaway has made significant strides while working with reputable companies such as Juniper Networks, Inc. and Telefonaktiebolaget Lm Ericsson (publ). His innovative approaches and expertise have profoundly impacted the advancements in software and hardware interactions.

Collaborations

Hathaway has collaborated with several notable professionals in his field, including Ricardo Ramirez and Nazar A Zaidi. Working alongside these experts has undoubtedly contributed to his expansive knowledge and transformative contributions in technology.

Conclusion

Robert G Hathaway stands out as a vital figure in the realm of innovations related to processor communications and networking. His patents not only showcase his technical prowess but also help pave the way for future advancements in computational technologies, affirming his status as a remarkable inventor in the tech industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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