Saratoga, CA, United States of America

Ranko L Scepanovic

This inventor holds 164 USPTO granted patents and 1 published patent application, primarily in Integrated Circuit Design (CPC class 364491). Top assignees: Lsi Logic Corporation, Lsi Corporation, Easic Corporation. Active years: 1996-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ranko L Scepanovic. Retrieved from https://idiyas.com/inventor/ranko-l-scepanovic

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 164 

% Patents Active = 75.6

Average Co-Inventor Count = 3.6

ph-index = 40

Forward Citations = 4,933(Granted Patents)

Forward Citations (Not Self Cited) = 4,636(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Cupertino, CA (US) (1996 - 2002)
  • Saratogo, CA (US) (2011)
  • San Jose, CA (US) (1996 - 2013)
  • Saratoga, CA (US) (2006 - 2015)

Company Filing History:


Years Active: 1996-2015

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Areas of Expertise:
ASIC Architecture
Transistor Chains
Data Shredding
Memory Models
Signal Delay Skew
Turbo Decoding
RRAM Memory
Memory Testing
Tiling
Integrated Circuit Layout
Command Language
Timing Models
164 patents (USPTO):Explore Patents

Title: Ranko Scepanovic: The Innovator Balancing Signal Delay and Skew

Introduction:

Ranko Scepanovic, a prolific inventor based in San Jose, CA, has made significant contributions to the field of electrical engineering and signal processing. With an extensive patent portfolio and a reputation for his expertise in reducing signal skew and delay, Scepanovic has cemented his status as an invaluable innovator in the industry. In this article, we will delve into his latest patents, career highlights, notable collaborations, and their collective impact on technological advancements.

Latest Patents:

1. Method and computer program for generating grounded shielding wires for signal wiring:

This patent presents a novel system and method for reducing signal skew. By identifying net groups and systematically routing connections within them, this invention optimizes the relationship between components and enables more efficient signal transmission. A key aspect of the innovation lies in routing grounded shielding wires in adjacent channels to minimize electromagnetic interference.

2. Method and apparatus for balancing signal delay skew:

This patent outlines a system and method for dynamically reducing signal delay skew within circuitry. By identifying connection paths lacking equivalent path fragments, this innovation generates a skew-corrected netlist and re-routes the affected connection paths accordingly. The resulting optimized netlist significantly improves signal synchronization and overall system performance.

Career Highlights:

Ranko Scepanovic has enjoyed a successful career in the technology industry and has been associated with renowned companies such as LSI Logic Corporation and LSI Corporation (now Broadcom Inc.). Throughout his tenure, he has contributed numerous innovative solutions to address challenges in signal processing, circuit design, and system optimization. Scepanovic's patents and inventions have deepened our understanding of signal skew reduction techniques and their practical implementations in modern electronic devices.

Collaborations:

While pursuing his inventive endeavors, Scepanovic has had the opportunity to collaborate with notable professionals in the industry. Alexander E. Andreev, an accomplished engineer, and James S. Koford, an expert in signal integrity, are two such colleagues who have shared their expertise and insights. Their collective efforts, combined with Scepanovic's innovative mindset, have resulted in groundbreaking advancements and technological breakthroughs.

Conclusion:

Ranko Scepanovic stands as a visionary inventor and engineer whose contributions have played a significant role in minimizing signal skew and delay within electronic systems. His impressive portfolio of patents, including the methods for generating grounded shielding wires and balancing signal delay skew, highlight the depth of his expertise. Collaborating with esteemed colleagues like Alexander E. Andreev and James S. Koford has further enhanced the impact of his work. With ongoing dedication to innovation, Scepanovic continues to push the boundaries of signal processing, ensuring sharper, faster, and more reliable electronic solutions for the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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