The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 2014
Filed:
Oct. 12, 2011
Applicants:
Alexander Andreev, San Jose, CA (US);
Sergey Gribok, Santa Clara, CA (US);
Ranko Scepanovic, Saratoga, CA (US);
Inventors:
Alexander Andreev, San Jose, CA (US);
Sergey Gribok, Santa Clara, CA (US);
Ranko Scepanovic, Saratoga, CA (US);
Assignee:
eASIC Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/08 (2006.01); H01L 47/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A via-configurable circuit block may contain chains of p-type and n-type transistors that may or may not be interconnected by means of configurable vias. Configurable vias may also be used to connect various transistor terminals to a ground line, a power line and/or to various terminals that may provide connections outside of the circuit block.