Ranjan Khurana

This inventor holds 13 USPTO granted patents, primarily in Semiconductor Fabrication. Top assignee: Micron Technology Incorporated. Active years: 2011-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ranjan Khurana. Retrieved from https://idiyas.com/inventor/ranjan-khurana

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 13

% Patents Active = 100.0

Average Co-Inventor Count = 3.7

ph-index = 4

Forward Citations = 27(Granted Patents)

Company Filing History:

13 out of 39,325

Micron Technology Incorporated

patents

Years Active: 2011-2017

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Areas of Expertise:

Substrate Mask Patterns

Semiconductor Devices

Memory Cell Arrays

Field Effect Transistors

Source/Drain Regions

Isolation Trenches

Semiconductor Constructions

Lattice Patterns

13 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9741580 - Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate (2017-08-22),

2. 9583381 - Methods for forming semiconductor devices and semiconductor device structures (2017-02-28),

3. 9460998 - Semiconductor constructions and methods of forming semiconductor constructions (2016-10-04),

4. 9229328 - Methods of forming semiconductor device structures, and related semiconductor device structures (2016-01-05),

5. 8999852 - Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate (2015-04-07),

6. 8937018 - Methods of forming a pattern on a substrate (2015-01-20),

7. 8889559 - Methods of forming a pattern on a substrate (2014-11-18),

8. 8889558 - Methods of forming a pattern on a substrate (2014-11-18),

9. 8796086 - Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate (2014-08-05),

10. 8741781 - Methods of forming semiconductor constructions (2014-06-03),

11. 8586429 - Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate (2013-11-19),

12. 8389353 - Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate (2013-03-05),

13. 8039340 - Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate (2011-10-18),

Title: Ranjan Khurana: Innovator in Semiconductor Technology

Introduction

Ranjan Khurana is a prominent inventor based in Boise, Idaho, known for his significant contributions to semiconductor technology. With a total of 13 patents to his name, he has made remarkable advancements in methods and structures related to substrates and semiconductor devices.

Latest Patents

Khurana's latest patents include innovative techniques such as substrate mask patterns and methods of forming structures on substrates. One notable patent describes a method of forming a pattern on a substrate, which involves creating spaced, upwardly-open, cylinder-like structures that project outward from a base. This method includes forming sidewall linings over the inner and outer sidewalls of these structures, resulting in interstitial spaces that are surrounded by longitudinally-contacting sidewall linings. Another patent focuses on methods for forming semiconductor devices, detailing processes that involve anti-spacer techniques to create openings in mask materials, ultimately exposing the substrate for further processing.

Career Highlights

Khurana is currently employed at Micron Technology Incorporated, a leading company in the semiconductor industry. His work has been instrumental in developing advanced semiconductor device structures, contributing to the company's reputation for innovation and excellence in technology.

Collaborations

Throughout his career, Khurana has collaborated with notable colleagues, including Anton J deVillers and Neal L Davis. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and advancements in semiconductor technology.

Conclusion

Ranjan Khurana's contributions to the field of semiconductor technology through his patents and work at Micron Technology Incorporated highlight his role as a key innovator. His advancements continue to shape the future of semiconductor devices and their applications.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]