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For the Inventor, By the Inventor

Sunnyvale, CA, United States of America

Rakesh L Notani

This inventor holds 33 USPTO granted patents and 3 published patent applications, primarily in Memory Calibration. Top assignee: Apple Inc.. Active years: 2014-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rakesh L Notani. Retrieved from https://idiyas.com/inventor/rakesh-l-notani

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 100.0

Average Co-Inventor Count = 3.5

ph-index = 7

Forward Citations = 148(Granted Patents)


Location History:

  • Cupertino, CA (US) (2016)
  • Sunnyvale, CA (US) (2014 - 2022)
  • Santa Clara, CA (US) (2019 - 2024)

Company Filing History:

goldMedal33 out of 43,562 
 
Apple Inc.
 patents

Years Active: 2014-2025

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Areas of Expertise:
Memory Subsystem
Calibration Techniques
Voltage Calibration
Latency Tolerance
Performance States
Reference Voltage
Memory Arbitration
Dynamic Switching
Adaptive Scheduling
Feedback-Controlled Oscillator
Data Transmission
Turn Techniques
33 patents (USPTO):Explore Patents
1. 12346566 - Write arbiter circuit with per-rank allocation override mode (2025-07-01),
2. 12293808 - Memory subsystem calibration using substitute results (2025-05-06),
3. 11875871 - Memory channels calibration during boot wherein channels are calibrated in parallel based on identifer (2024-01-16),
4. 11776597 - Memory subsystem calibration using substitute results (2023-10-03),
5. 11527269 - Memory channels calibration during boot wherein channels are calibrated in parallel based on identifers (2022-12-13),
6. 11501820 - Selective reference voltage calibration in memory subsystem (2022-11-15),
7. 11226752 - Filtering memory calibration (2022-01-18),
8. 11221798 - Write/read turn techniques based on latency tolerance (2022-01-11),
9. 11217285 - Memory subsystem calibration using substitute results (2022-01-04),
10. 10991403 - Memory calibration with end point replay (2021-04-27),
11. 10877688 - System for managing memory devices (2020-12-29),
12. 10872652 - Method and apparatus for optimizing calibrations of a memory subsystem (2020-12-22),
13. 10734983 - Duty cycle correction with read and write calibration (2020-08-04),
14. 10545701 - Memory arbitration techniques based on latency tolerance (2020-01-28),
15. 10515028 - Reference voltage calibration using a qualified weighted average (2019-12-24),

Title: The Innovative Journey of Rakesh L Notani

Introduction: Rakesh L Notani, a visionary inventor based in Sunnyvale, CA, has made significant contributions to the field of technology through his groundbreaking innovations.

Latest Patents: Rakesh L Notani holds several patents in the areas of artificial intelligence, machine learning, and data analytics, showcasing his expertise in cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Rakesh L Notani has worked with top tech companies, leading research institutions, and universities, honing his skills and pushing the boundaries of innovation.

Collaborations: Throughout his career, Rakesh L Notani has collaborated with renowned scientists, engineers, and researchers, fostering a culture of creativity and excellence in the projects he undertakes.

Conclusion: Rakesh L Notani's relentless pursuit of innovation and his passion for creating solutions that shape the future make him a true pioneer in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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