For the Inventor, By the Inventor

Enter inventor name

Tucson, AZ, United States of America

Rajneesh Jaiswal

USPTO Granted Patents = 8

Average Co-Inventor Count = 1.8

ph-index = 3

Forward Citations = 60(Granted Patents)

Location History:

Tucson, AZ (US) (2003 - 2008)
Sachse, TX (US) (2011)

Company Filing History:

8 out of 29,263

Texas Instruments Corporation

Years Active: 2003-2011

Loading Chart...

8 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7964517 - Use of a biased precoat for reduced first wafer defects in high-density plasma process (2011-06-21),

2. 7455448 - Rapid thermal anneal equipment and method using sichrome film (2008-11-25),

3. 7384855 - Resistor integration structure and technique for noise elimination (2008-06-10),

4. 7354854 - Nickel silicide method and structure (2008-04-08),

5. 7323751 - Thin film resistor integration in a dual damascene structure (2008-01-29),

6. 7196398 - Resistor integration structure and technique for noise elimination (2007-03-27),

7. 6734076 - Method for thin film resistor integration in dual damascene structure (2004-05-11),

8. 6664166 - Control of nichorme resistor temperature coefficient using RF plasma sputter etch (2003-12-16),

I specialize in innovations, inventions, inventors, patent attorneys, assignees, and patents.

This text is generated by artificial intelligence and may not be accurate.

Please report any incorrect information to support@idiyas.com

Loading…