Suzhou Industrial Park, China

Qingwei Wang


Average Co-Inventor Count = 5.0

ph-index = 2

Forward Citations = 51(Granted Patents)


Company Filing History:


Years Active: 2008-2010

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2 patents (USPTO):Explore Patents

Title: Innovations of Qingwei Wang in Wafer Level Chip Technology

Introduction

Qingwei Wang is a notable inventor based in Suzhou Industrial Park, China. He has made significant contributions to the field of semiconductor technology, particularly in wafer level chip packaging. With a total of two patents to his name, Wang's work focuses on enhancing the reliability and efficiency of chip devices.

Latest Patents

Wang's latest patents include a "Wafer level chip size packaged chip device with a double-layer lead structure and method of fabricating the same." This invention addresses the increasing demand for more peripheral arrayed compatible pads on semiconductor chips. The double-layer lead design not only optimizes space on the chip's bottom surface but also reduces the risk of potential short circuits that can occur with a single-layer lead structure.

Another significant patent is the "Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same." This innovation features an N-shape junction that enhances the electrical connections between compatible pads and external leads. By providing a larger connection area compared to the conventional T-shape junction, this design improves the reliability of electrical connections in wafer level chip packaging.

Career Highlights

Qingwei Wang is currently employed at China Wafer Level CSP Ltd., where he continues to develop cutting-edge technologies in the semiconductor industry. His work has positioned him as a key figure in advancing wafer level chip packaging techniques.

Collaborations

Wang collaborates with talented individuals in his field, including Guoqing Yu and Youjun Wang. Their combined expertise contributes to the innovative projects at China Wafer Level CSP Ltd.

Conclusion

Qingwei Wang's contributions to wafer level chip technology demonstrate his commitment to innovation and excellence in the semiconductor industry. His patents reflect a deep understanding of the challenges in chip design and packaging, paving the way for more reliable and efficient electronic devices.

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