Purna Chandra Nayak

Title: Purna C Nayak: Innovator in Low Power Clock Gate Circuit Technology

Introduction

Purna C Nayak is a notable inventor based in Bengaluru, India. He has made significant contributions to the field of electronics, particularly in optimizing power consumption in clock gate circuits. His innovative approach has implications for enhancing the efficiency of electronic devices.

Latest Patents

Purna C Nayak holds a patent for a "Low power clock gate circuit." This invention describes a clock gate circuit (CGC) that optimizes dynamic power when the clock is gated. The CGC aids in reducing dynamic power in the clock network by offering lower clock pin capacitance and providing opportunities for downsizing clock pin drivers. By reducing the load on the input clock pin, switching power and dynamic power consumption are minimized. Additionally, the dynamic power of the clock network is further reduced by downsizing the clock buffers that drive the CGC clock pins.

Career Highlights

Purna C Nayak is currently employed at Intel Corporation, where he continues to work on innovative technologies that push the boundaries of electronic design. His expertise in power optimization has made him a valuable asset to the company.

Collaborations

Purna has collaborated with talented coworkers such as Gururaj Shamanna and Mitesh Goyal. Their combined efforts contribute to the advancement of technology in their field.

Conclusion

Purna C Nayak's work in developing low power clock gate circuits exemplifies the importance of innovation in reducing power consumption in electronics. His contributions are paving the way for more efficient electronic devices in the future.