The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2021
Filed:
Aug. 30, 2019
Intel Corporation, Santa Clara, CA (US);
Gururaj Shamanna, Austin, TX (US);
Mitesh Goyal, Bangalore, IN;
Jagadeesh Chandra Salaka, Bengaluru, IN;
Purna C. Nayak, Bangalore, IN;
Abhishek Sharma, Noida, IN;
Harishankar Sahu, Bangalore, IN;
Intel Corporation, Santa Clara, CA (US);
Abstract
A clock gate circuit (CGC) is described that optimizes dynamic power of the CGC when clock is gated. The CGC helps in dynamic power reduction of clock network by offering lower clock pin capacitance and also by providing clock pin driver downsizing opportunities. Switching power, and hence, dynamic power is reduced when load on the input clock pin is reduced. Further, dynamic power of the clock network also reduces by downsizing the clock buffers, which drive the CGC clock pins.