Atlanta, GA, United States of America

Pulugurtha Markondeya Raj

This inventor holds 5 USPTO granted patents. Top assignee: Georgia Tech Research Corporation. Active years: 2007-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pulugurtha Markondeya Raj. Retrieved from https://idiyas.com/inventor/pulugurtha-markondeya-raj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 20.0

Average Co-Inventor Count = 3.7

ph-index = 3

Forward Citations = 15(Granted Patents)


Location History:

  • Atlanta, GA (US) (2007 - 2009)
  • Tucker, GA (US) (2015)

Company Filing History:


Years Active: 2007-2015

Loading Chart...
5 patents (USPTO):Explore Patents

Title: Innovations of Pulugurtha Markondeya Raj

Introduction

Pulugurtha Markondeya Raj is a notable inventor based in Atlanta, GA. He has made significant contributions to the field of interconnect structures, holding a total of five patents. His work focuses on developing low-cost solutions that address thermal coefficient of expansion (TCE) mismatches in electronic components.

Latest Patents

Among his latest patents is a groundbreaking invention titled "Interconnect structures and methods of making the same." This invention provides a stress-relieving, second-level interconnect structure that is designed to accommodate TCE mismatches between low-TCE packages and printed circuit boards (PCBs). The interconnect structure is reworkable and scalable, with pitches ranging from about 1 millimeter (mm) to about 150 micrometers (μm). It comprises a dielectric body element and at least one interconnection array that creates a conductive path between two electronic components. Each interconnection array consists of multiple wires that ensure both conductivity and compliance within the overall interconnect structure. The versatility and scalability of this invention make it highly applicable in both two-dimensional and evolving three-dimensional integrated circuit (IC) structures.

Another significant patent is titled "Stress relieving second level interconnect structures and methods of making the same." This invention also focuses on providing a low-cost, stress-relieving interconnect structure that accommodates TCE mismatches. It includes a first pad, a supporting pillar, and a solder bump, which work together to absorb plastic strain and enhance compliance between electronic components.

Career Highlights

Pulugurtha Markondeya Raj is affiliated with the Georgia Tech Research Corporation, where he continues to innovate and contribute to advancements in electronic interconnect technology. His work has garnered attention for its practical applications and cost-effectiveness.

Collaborations

He has collaborated with notable colleagues, including Rao R Tummala and Ankur Aggarwal, who share his commitment to advancing technology in the field of electronics.

Conclusion

Pulugurtha Markondeya Raj is a distinguished inventor whose work in interconnect structures has made a significant impact on the electronics industry. His innovative patents address critical challenges in electronic component design and manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…