The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 2015
Filed:
Sep. 20, 2011
Pulugurtha Markondeya Raj, Tucker, GA (US);
Nitesh Kumbhat, Atlanta, GA (US);
Venkatesh V. Sundaram, Alpharetta, GA (US);
Rao R. Tummala, Greensboro, GA (US);
Xian Qin, Atlanta, GA (US);
Pulugurtha Markondeya Raj, Tucker, GA (US);
Nitesh Kumbhat, Atlanta, GA (US);
Venkatesh V. Sundaram, Alpharetta, GA (US);
Rao R. Tummala, Greensboro, GA (US);
Xian Qin, Atlanta, GA (US);
Georgia Tech Research Corporation, Atlanta, GA (US);
Abstract
Provided is a stress-relieving, second-level interconnect structure that is low-cost and accommodates thermal coefficient of expansion (TCE) mismatch between low-TCE packages and printed circuit boards (PCBs). The interconnect structure comprises at least a first pad, a supporting pillar, and a solder bump, wherein the first pad and supporting pillar are operative to absorb substantially all plastic strain, thereby enhancing compliance between the two electronic components.