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For the Inventor, By the Inventor

New Providence, NJ, United States of America

Prasad Subramaniam

USPTO Granted Patents = 11 

Average Co-Inventor Count = 2.8

ph-index = 2

Forward Citations = 7(Granted Patents)


Location History:

  • New Providence, NJ (US) (2016 - 2017)
  • Stirling, NJ (US) (2022 - 2024)

Company Filing History:

goldMedal9 out of 30 
 
Esilicon Corporation
 patents
silverMedal2 out of 1,123 
 
Marvell Asia Pte., Ltd.
 patents

Years Active: 2016-2024

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11 patents (USPTO):
1. 11942409 - High density low power interconnect using 3D die stacking (2024-03-26),
2. 11233002 - High density low power interconnect using 3D die stacking (2022-01-25),
3. 9852250 - Memory optimization in VLSI design using generic memory models (2017-12-26),
4. 9727682 - Designing memories in VLSI design using specific memory models generated from generic memory models (2017-08-08),
5. 9727681 - Generating specific memory models using generic memory models for designing memories in VLSI design (2017-08-08),
6. 9460257 - Scaling of integrated circuit design including high-level logic components (2016-10-04),
7. 9460256 - Integrated circuit design scaling for recommending design point (2016-10-04),
8. 9460255 - Scaling of integrated circuit design including logic and memory components (2016-10-04),
9. 9460254 - Scaling logic components of integrated circuit design (2016-10-04),
10. 9454636 - Integrated circuit design optimization (2016-09-27),
11. 9454628 - Scaling memory components of integrated circuit design (2016-09-27),

Title: **Innovative Contributions of Prasad Subramaniam in Circuit Design**

Introduction

Prasad Subramaniam, based in New Providence, NJ, is a renowned inventor with a remarkable portfolio that includes 11 patents. His work primarily focuses on advanced circuit designs, showcasing his expertise in optimizing interconnect systems for integrated circuits.

Latest Patents

Among his latest innovations are several patents related to high-density, low-power interconnects using 3D die stacking. One patent describes an integrated circuit comprising a first set of dies and a second set of interposer dies. In this configuration, at least two dies from the first set are interconnected through interposer dies that serve as mediators, complete with buffers that condition signal transfer between dies. Another patent further extends this concept by detailing an electronic circuit implemented through a first logic die and a second logic die, connected by an interposer array. This design aims to enhance signal integrity and reliability in complex electronic systems.

Career Highlights

Throughout his professional journey, Prasad has made significant strides in the field of semiconductor technology while working with notable companies such as Esilicon Corporation and Marvell Asia Pte., Ltd. His contributions have pushed the boundaries of what is possible in integrated circuit design, aligning with the industry's evolving needs.

Collaborations

Prasad Subramaniam has collaborated with several experts, including his colleagues Ferran Martorell and Hao Nham. These partnerships have facilitated the exchange of ideas and the advancement of innovative technologies within the realm of circuit design.

Conclusion

In summary, Prasad Subramaniam stands out as a key figure in the evolution of integrated circuit technology. With a solid foundation of patents and collaborations, his work continues to have a lasting impact on the industry. His innovative approach to circuit design reflects the growing importance of efficiency and performance in the world of electronics.

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