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San Jose, CA, United States of America

Esilicon Corporation

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USPTO Granted Patents = 30

Trademarks = 3

Forward Citations = 154

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22 inventors (with patents filed for the assignee):

Prasad Subramaniam (9 out of 11 patents)

Ferran Martorell (7 out of 9 patents)

Javier DeLaCruz (6 out of 6 patents)

4. Hao Nham (6 out of 6 patents)

5. Rakesh Chadha (6 out of 6 patents)

6. Michael Anthony Zampaglione (3 out of 25 patents)

7. Nicola Ghittori (3 out of 13 patents)

8. Claudio Nani (3 out of 7 patents)

9. Hai Phuong (3 out of 3 patents)

10. Jordi Cortadella (3 out of 7 patents)

11. Luciano Lavagno (3 out of 18 patents)

12. Emre Tuncer (2 out of 15 patents)

13. Enrico Monaco (2 out of 3 patents)

14. Dennis E Dudeck (2 out of 23 patents)

15. Sabhapathi Naidu Annamaneni (2 out of 2 patents)

Core Competencies:

SerDes Transceivers

Analog to Digital Converter

Content Addressable Memory

VLSI Design

Error Detection

Integrated Circuit Scaling

Memory Optimization

Clock Domain Crossing

Thru-Silicon Vias

Asynchronous Circuits

Supply Chain Optimization

30 patents: Sort by Forward Citations

1. 10554449 - Baseline wander compensation in SerDes transceivers (2020-02-04),

2. 10469096 - Successive approximation register (SAR) analog to digital converter (ADC) with partial loop-unrolling (2019-11-05),

3. 10454491 - Successive approximation register (SAR) analog to digital converter (ADC) with partial loop-unrolling (2019-10-22),

4. 10050003 - Elongated pad structure (2018-08-14),

5. 10032516 - Duo content addressable memory (CAM) using a single CAM (2018-07-24),

6. 10018670 - Wireless probes (2018-07-10),

7. 9984997 - Communication interface architecture using serializer/deserializer (2018-05-29),

8. 9852250 - Memory optimization in VLSI design using generic memory models (2017-12-26),

9. 9762261 - Error detection and correction in ternary content addressable memory (TCAM) (2017-09-12),

10. 9727682 - Designing memories in VLSI design using specific memory models generated from generic memory models (2017-08-08),

11. 9727681 - Generating specific memory models using generic memory models for designing memories in VLSI design (2017-08-08),

12. 9711220 - Duo content addressable memory (CAM) using a single CAM (2017-07-18),

13. 9529669 - Error detection and correction in binary content addressable memory (BCAM) (2016-12-27),

14. 9461000 - Parallel signal via structure (2016-10-04),

15. 9460257 - Scaling of integrated circuit design including high-level logic components (2016-10-04),

Company Overview

Esilicon Corporation, based in San Jose, California, specializes in advanced semiconductor solutions, focusing on custom silicon design and manufacturing. The company is dedicated to providing innovative integrated circuit (IC) solutions that cater to a variety of applications, including data centers, consumer electronics, and telecommunications. Esilicon leverages its expertise in chip design and system integration to deliver high-performance products that meet the evolving demands of the technology landscape.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 27 2026

30 Patents

#264 in San Jose, CA

#2,686 in California

#11,288 in US

#21,924 in the World

San Jose, CA, United States of America

Esilicon Corporation

Forward Citations = 154

22 inventors:

Prasad Subramaniam (9 out of 11 patents)

Ferran Martorell (7 out of 9 patents)

Javier DeLaCruz (6 out of 6 patents)

4. Hao Nham (6 out of 6 patents)

5. Rakesh Chadha (6 out of 6 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Esilicon Corporation. Retrieved from https://idiyas.com/company/esilicon

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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