Santa Clara, CA, United States of America

Phani K Saripella

This inventor holds 3 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2000-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Phani K Saripella. Retrieved from https://idiyas.com/inventor/phani-k-saripella

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 66.7

Average Co-Inventor Count = 5.0

ph-index = 3

Forward Citations = 35(Granted Patents)


Company Filing History:


Years Active: 2000-2008

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3 patents (USPTO):Explore Patents

Title: Phani K Saripella: Innovator in Circuit Design

Introduction

Phani K Saripella is a notable inventor based in Santa Clara, CA. He has made significant contributions to the field of computer-aided design, particularly in the area of circuit design. With a total of 3 patents to his name, Saripella's work focuses on enhancing the efficiency and functionality of datapath circuits.

Latest Patents

One of Saripella's latest patents is titled "Structural regularity extraction and floorplanning in datapath circuits using vectors." This invention involves a computer-aided design system that includes a functional regularity extraction component, a structural regularity extraction component, and a floorplanning component. The structural regularity extraction component is designed to extract regularity for circuits based on the structural characteristics of a logic design. It automatically generates a set of vectors for the logic design, where a vector is defined as a group of template instances that are identical in function and structure. These vectors are then utilized by the floorplanning component to generate a circuit layout.

Another patent under his name also focuses on "Structural regularity extraction and floorplanning in datapath circuits using vectors." This invention emphasizes the functional regularity extraction component, which extracts regularity based on the functional characteristics of a logic design. It generates a set of templates to cover a circuit, where a template represents a subcircuit with at least two instances in the circuit. The templates produced are then used by the structural regularity extraction component to enhance the design process.

Career Highlights

Phani K Saripella is currently employed at Intel Corporation, where he continues to innovate in the field of circuit design. His work has been instrumental in advancing the capabilities of computer-aided design systems, making them more efficient and effective for modern applications.

Collaborations

Throughout his career, Saripella has collaborated with notable colleagues, including Sudhakar S Kale and Amit Chowdhary. These collaborations have contributed to the development of innovative solutions in circuit design.

Conclusion

Phani K Saripella is a distinguished inventor whose work in circuit design has led to significant advancements in computer-aided design systems. His contributions continue to shape the future of technology in this field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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