Pedja Raspopovic is a prominent inventor based in Cupertino, California. He has made significant contributions to the field of integrated circuit design, holding a total of 18 patents. His work focuses on optimizing circuit designs to enhance performance and efficiency.

Latest Patents

Among his latest patents is a method and apparatus for adaptive timing optimization of an integrated circuit design. This innovation optimizes a functional block within a netlist by assigning delay values to various pins, which correspond to signal paths through the block. The selected delay value combinations satisfy predetermined criteria, leading to improved circuit configurations. Another notable patent is a virtual tree-based netlist model and method of delay estimation for an integrated circuit design. This model incorporates fan-in and fan-out count variables, along with a delay variable, to estimate delays effectively.

Career Highlights

Pedja Raspopovic is currently employed at LSI Logic Corporation, where he continues to push the boundaries of integrated circuit technology. His expertise in circuit design has made him a valuable asset to the company and the industry as a whole.

Collaborations

Throughout his career, Raspopovic has collaborated with talented individuals such as Ranko L Scepanovic and Alexander E Andreev. These partnerships have fostered innovation and contributed to the success of various projects.

Conclusion

Pedja Raspopovic's contributions to integrated circuit design exemplify the spirit of innovation. His patents and collaborations highlight his commitment to advancing technology in this critical field.

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