Highland, NY, United States of America

Pawel Owczarczyk

This inventor holds 19 USPTO granted patents, primarily in Semiconductor Design. Top assignees: International Business Machines Corporation, Globalfoundries Inc.. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pawel Owczarczyk. Retrieved from https://idiyas.com/inventor/pawel-owczarczyk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 47.4

Average Co-Inventor Count = 4.2

ph-index = 5

Forward Citations = 39(Granted Patents)


Company Filing History:


Years Active: 2015-2026

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Areas of Expertise:
Fault-Sensing Circuit
Voltage Sensitive Current
Dynamic Frequency Control
Programmable Delay
Capacitance Interconnect
Chip-to-Chip Interfaces
Timing Uncertainty
Early Mode Protection
Reconfigurable Circuit
Clock Frequency Range
Exerciser Device Placement
Voltage Supply Control
19 patents (USPTO):Explore Patents

Title: The Innovative Mind of Pawel Owczarczyk

Introduction

Pawel Owczarczyk, an innovative inventor based in Highland, NY, has made significant contributions to the field of semiconductor technology with a total of 17 patents to his name. His inventive spirit is reflected in his latest patents, which address critical issues in semiconductor device operation and longevity.

Latest Patents

One of Pawel's latest inventions is a "Method to limit the time a semiconductor device operates above a maximum operating voltage." This innovative method identifies and mitigates undesirable power or voltage fluctuations within semiconductor devices. For instance, it enables the detection of regions, such as individual processors on a chip, exhibiting reduced power draw that results in localized voltage spikes. By activating circuits or current generators to draw additional power, the protective current successfully lowers voltage spikes back within the specified range. This reduction in time above maximum voltage not only enhances device reliability but also extends the lifespan of semiconductor devices in operation.

Another recent patent revolves around the utilization of "FEOL interconnect used as capacitance over fins instead of gates." This invention details the formation of semiconductor devices by creating gates and fin interconnects in specific directions. By layering dielectric materials and capacitor interconnects over the fins, this approach enhances device functionality and performance.

Career Highlights

Pawel Owczarczyk has worked with prestigious organizations such as IBM and Globalfoundries Inc., where he honed his skills in semiconductor technology. His experiences in these dynamic companies provided him the platform to develop numerous patents that reflect his innovative thinking and technical expertise.

Collaborations

Throughout his career, Pawel has collaborated with notable professionals, including Alan J. Drake and Marshall Dale Tiner. Their collective expertise may have inspired various advancements in their field and contributed to the successful outcomes of their projects.

Conclusion

Pawel Owczarczyk's innovative mindset and wealth of experience have positioned him as a key player in semiconductor technology. With numerous patents to his credit, he has made impactful strides towards enhancing the reliability and efficiency of semiconductor devices. His work continues to inspire future innovations in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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