The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2023
Filed:
Apr. 05, 2022
International Business Machines Corporation, Armonk, NY (US);
Adam Benjamin Collura, Hopewell Junction, NY (US);
Michael Romain, Beacon, NY (US);
William V. Huott, Holmes, NY (US);
Pawel Owczarczyk, Highland, NY (US);
Christian Jacobi, West Park, NY (US);
Anthony Saporito, Highland, NY (US);
Chung-Lung K. Shum, Wappingers Falls, NY (US);
Alper Buyuktosunoglu, White Plains, NY (US);
Tobias Webel, Schwaebisch-Gmuend, DE;
Michael Joseph Cadigan, Jr., Poughkeepsie, NY (US);
Paul Jacob Logsdon, Poughkeepsie, NY (US);
Sean Michael Carey, Hyde Park, NY (US);
Stefan Payer, Stuttgart, DE;
Karl Evan Smock Anderson, Poughkeepsie, NY (US);
Mark Cichanowski, Hutto, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.