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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11322439 B1

PDFFull Text
Date of Patent:
May. 03, 2022

Filed:

Nov. 13, 2019

Feol interconnect used as capacitance over fins instead of gates

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Michael Sperling, Poughkeepsie, NY (US);

Erik English, Beacon, NY (US);

Akil Khamisi Sutton, Poughkeepsie, NY (US);

Pawel Owczarczyk, Highland, NY (US);

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);

Attorneys:

Cantor Colburn LLP

Jeffrey Ingalls

Primary Examiner:

Theresa T Doan

Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2012.01); H01L 23/522 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 49/02 (2006.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); G06F 111/04 (2020.01); G06F 111/20 (2020.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); G06F 30/394 (2020.01); G06F 30/398 (2020.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 27/0886 (2013.01); H01L 28/60 (2013.01); G06F 2111/04 (2020.01); G06F 2111/20 (2020.01); G06F 2119/18 (2020.01);
Abstract

Aspects of the invention include forming a semiconductor device. Gates are formed in a first direction over fins, the gates including gate material, the fins being formed in a second direction. Fin interconnects are formed in the first direction over the fins. A dielectric material is formed on the fins, and capacitor interconnects are formed over portions of the dielectric material in the first direction over the fins.

Find Patent Forward Citations

Quick Actions:

Sperling, Michael. (2022). Feol interconnect used as capacitance over fins instead of gates (U.S. Patent No. 11322439). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11322439

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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