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For the Inventor, By the Inventor

Wappingers Falls, NY, United States of America

Paul A Papworth

USPTO Granted Patents = 6

Average Co-Inventor Count = 6.0

ph-index = 5

Forward Citations = 43(Granted Patents)


Company Filing History:

goldMedal6 out of 164,108 
 
International Business Machines Corporation
 patents

Years Active: 2006-2011

where 'Filed Patents' based on already Granted Patents

6 patents (USPTO):
1. 7911024 - Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof (2011-03-22),
2. 7763518 - Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof (2010-07-27),
3. 7691716 - Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation (2010-04-06),
4. 7485537 - Method of fabricating a vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness (2009-02-03),
5. 7375410 - Ultra-thin SOI vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation and methods thereof (2008-05-20),
6. 7115965 - Vertical bipolar transistor with a majority carrier accumulation layer as a subcollector for SOI BiCMOS with reduced buried oxide thickness for low-substrate bias operation (2006-10-03),

Title: Innovations of Paul A Papworth

Introduction

Paul A Papworth is a notable inventor based in Wappingers Falls, NY (US). He has made significant contributions to the field of semiconductor technology, holding a total of six patents. His work primarily focuses on enhancing the efficiency and cost-effectiveness of bipolar junction transistors.

Latest Patents

One of his latest patents is for ultra-thin silicon-on-insulator (SOI) vertical bipolar transistors with an inversion collector on thin-buried oxide (BOX) for low substrate-bias operation. This innovative design eliminates the need for an impurity-doped collector by utilizing a back gate-induced, minority carrier inversion layer as the intrinsic collector. The SOI substrate is biased to form an inversion layer at the bottom of the base region, which serves as the collector. This design simplifies the integration scheme and significantly reduces manufacturing costs. Additionally, the method of fabricating bipolar junction transistors on selected areas of a very thin BOX allows for a reduced substrate bias while maintaining the advantages of a thick BOX underneath the complementary metal-oxide-semiconductor (CMOS).

Career Highlights

Paul A Papworth is currently associated with International Business Machines Corporation (IBM), where he continues to innovate in the field of semiconductor technology. His work has been instrumental in advancing the capabilities of electronic devices.

Collaborations

He has collaborated with notable coworkers such as Herbert Lei Ho and Mahender Kumar, contributing to various projects that enhance the performance of semiconductor devices.

Conclusion

Paul A Papworth's contributions to the field of semiconductor technology through his innovative patents and collaborations have made a significant impact on the industry. His work continues to pave the way for advancements in electronic devices.

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