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For the Inventor, By the Inventor

Grenoble, France

Nicolas Anquet

This inventor holds 17 USPTO granted patents and 3 published patent applications and 4 EPO patents, primarily in System On Chip Design. Top assignees: Stmicroelectronics (Alps) Sas, Stmicroelectronics (Grand Ouest) Sas, Stmicroelectronics (Grenoble 2) Sas. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Nicolas Anquet. Retrieved from https://idiyas.com/inventor/nicolas-anquet

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17 

% Patents Active = 70.6

 

Average Co-Inventor Count = 2.3

ph-index = 2

Forward Citations = 8(Granted Patents)


Company Filing History:

goldMedal11 out of 163 
 
Stmicroelectronics (Alps) Sas
 patents
silverMedal8 out of 86 
 
Stmicroelectronics (Grand Ouest) Sas
 patents
bronzeMedal3 out of 649 
 
Stmicroelectronics (Grenoble 2) Sas
 patents
4. 3 out of 1,029 
 
Stmicroelectronics (Rousset) Sas
 patents
5. 3 out of 1,285 
 
Stmicroelectronics International N.v.
 patents
6. 2 out of 684 
 
St-Ericsson Sa
 patents
7. 1 out of 5,702 
 
Stmicroelectronics S.r.l.
 patents
where one patent can have more than one assignee

Years Active: 2015-2026

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Areas of Expertise:
Interface Circuit
Memory Firewall
Secured Deciphering
Ciphering Keys
Secured Boot
Peripheral Access Management
Debugging Management
Symmetric Encryption
Data Protection
Built-In Self-Test
17 patents (USPTO):Explore Patents
1. 12783740 - Emulation process and circuit for a read-only memory (2026-11-03),
2. 12657147 - Interface circuit and method (2026-06-16),
3. 12619555 - Circuit and method for interfacing with peripheral circuits (2026-05-05),
4. 12455692 - Management of a memory firewall in a system on chip (2025-10-28),
5. 12045378 - Secured storage of ciphering keys (2024-07-23),
6. 12045377 - Method and device for secured deciphering of ciphering data (2024-07-23),
7. 11962462 - Method for managing the operation of a system on chip, and corresponding system on chip (2024-04-16),
8. 11914718 - Secured boot of a processing unit (2024-02-27),
9. 11876732 - Method for managing the configuration of access to peripherals and their associated resources of a system on chip, and corresponding system on chip (2024-01-16),
10. 11829188 - Method for managing the debugging of a system on chip forming for example a microcontroller, and corresponding system on chip (2023-11-28),
11. 11700174 - Method for managing the operation of a system on chip, and corresponding system on chip (2023-07-11),
12. 11698993 - Integrated circuit configured to perform symmetric encryption operations with secret key protection (2023-07-11),
13. 11610025 - Integrated circuit configured to carry out symmetric encryption operations without secret key transmission (2023-03-21),
14. 11281807 - Processing system, related integrated circuit and method (2022-03-22),
15. 10331530 - Data protection for memory with built-in self-test (2019-06-25),

Title: Inventor Nicolas Anquet

Introduction: Nicolas Anquet is a renowned inventor based in Grenoble, France, known for his groundbreaking contributions to various technological fields.

Latest Patents: Nicolas Anquet holds several patents in the areas of renewable energy technologies, smart devices, and sustainable transportation solutions.

Career Highlights: With a career spanning over two decades, Nicolas Anquet has worked with leading research institutions and companies to develop innovative solutions that have significantly impacted the industry.

Collaborations: Throughout his career, Nicolas Anquet has collaborated with top engineers, scientists, and designers to bring his inventions to life, fostering a culture of creativity and excellence.

Conclusion: Nicolas Anquet's passion for innovation and his dedication to creating a sustainable future through technology make him a standout figure in the world of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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