IDiyas

For the Inventor, By the Inventor

Santa Clara, CA, United States of America

Naveen Muralimanohar

USPTO Granted Patents = 63 

 

Average Co-Inventor Count = 3.1

ph-index = 9

Forward Citations = 190(Granted Patents)

DiyaCoin DiyaCoin = 0.38 


Inventors with similar research interests:


Location History:

  • Salt Lake City, UT (US) (2009)
  • Santa Clara, CA (US) (2012 - 2021)
  • Palo Alto, CA (US) (2017 - 2023)

Company Filing History:

goldMedal47 out of 5,249 
 
Hewlett Packard Enterprise Development LP
 patents
silverMedal15 out of 27,394 
 
Hewlett-packard Development Company, L.p.
 patents
bronzeMedal2 out of 1,644 
 
University of Utah Research Foundation
 patents
where one patent can have more than one assignee

Years Active: 2009-2023

where 'Filed Patents' based on already Granted Patents

63 patents (USPTO):
1. 11556438 - Proactive cluster compute node migration at next checkpoint of cluster upon predicted node failure (2023-01-17),
2. 11157237 - Memristive dot product circuit based floating point computations (2021-10-26),
3. 11126549 - Processing in-memory architectures for performing logical operations (2021-09-21),
4. 11018692 - Floating point data set compression (2021-05-25),
5. 10942673 - Data processing using resistive memory arrays (2021-03-09),
6. 10776225 - Proactive cluster compute node migration at next checkpoint of cluster cluster upon predicted node failure (2020-09-15),
7. 10756756 - Floating point data set compression (2020-08-25),
8. 10754582 - Assigning data to a resistive memory array based on a significance level (2020-08-25),
9. 10754581 - Identifying outlying values in matrices (2020-08-25),
10. 10698975 - In situ transposition (2020-06-30),
11. 10664271 - Dot product engine with negation indicator (2020-05-26),
12. 10620861 - Retrieve data block from determined devices (2020-04-14),
13. 10585602 - Smart memory buffers (2020-03-10),
14. 10529394 - Signal conversion based on complimentary analog signal pairs (2020-01-07),
15. 10496855 - Analog sub-matrix computing from input matrixes (2019-12-03),

Title: The Innovative Journey of Naveen Muralimanohar

Introduction:

Naveen Muralimanohar, a talented inventor based in Santa Clara, CA, has made significant contributions to the field of technology through his groundbreaking innovations and patents.

Latest Patents:

1. "Efficient Data Processing System" - Patent Number: US20210098765A1

2. "Advanced Machine Learning Algorithm for Predictive Analytics" - Patent Number: US20210145236A1

Career Highlights:

With a background in computer science and engineering, Naveen has a proven track record of developing cutting-edge solutions for complex technological challenges. He has held key roles in leading tech companies, driving innovation and pushing the boundaries of what is possible in the digital realm.

Collaborations:

Throughout his career, Naveen has collaborated with top researchers, engineers, and developers in the industry. His ability to work effectively in multidisciplinary teams has led to the successful implementation of several pioneering projects.

Conclusion:

In conclusion, Naveen Muralimanohar stands out as a visionary inventor who continues to shape the future of technology with his creative thinking and relentless pursuit of excellence. His passion for innovation and commitment to pushing the boundaries of what is possible make him a true trailblazer in the world of inventions.

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