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For the Inventor, By the Inventor

Austin, TX, United States of America

Naoaki Aoki

This inventor holds 7 USPTO granted patents. Top assignee: International Business Machines Corporation. Active years: 1998-2003.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoaki Aoki. Retrieved from https://idiyas.com/inventor/naoaki-aoki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 4

Forward Citations = 59(Granted Patents)


Company Filing History:

goldMedal7 out of 166,325 
 
International Business Machines Corporation
 patents

Years Active: 1998-2003

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7 patents (USPTO):Explore Patents
1. 6584485 - 4 to 2 adder (2003-06-24),
2. 6453390 - Processor cycle time independent pipeline cache and method for pipelining data from a cache (2002-09-17),
3. 6453258 - Optimized burn-in for fixed time dynamic logic circuitry (2002-09-17),
4. 6356990 - Set-associative cache memory having a built-in set prediction array (2002-03-12),
5. 6239620 - Method and apparatus for generating true/complement signals (2001-05-29),
6. 5877972 - High speed incrementer with array method (1999-03-02),
7. 5771268 - High speed rotator with array method (1998-06-23),

Title: Naoaki Aoki: Innovator in Dynamic Logic Circuitry

Introduction

Naoaki Aoki is a prominent inventor based in Austin, TX (US). He has made significant contributions to the field of dynamic logic circuitry, holding a total of 7 patents. His work focuses on enhancing the efficiency and performance of electronic components.

Latest Patents

Among his latest patents is the "4 to 2 adder," which discloses a four-input to two-output adder. This innovative design includes a sum-lookahead full adder and a modified full adder. The sum-lookahead full adder utilizes an XOR block and an AXOR block to process multiple inputs and generate sum signals. Another notable patent is for "Optimized burn-in for fixed time dynamic logic circuitry." This patent outlines a system and method for ensuring comprehensive testing coverage of components during a burn-in test cycle, enhancing the reliability of dynamic logic macros.

Career Highlights

Naoaki Aoki is currently employed at International Business Machines Corporation (IBM). His work at IBM has allowed him to push the boundaries of technology in dynamic logic circuitry, contributing to advancements that benefit the industry.

Collaborations

Some of his notable coworkers include Sang Hoo Dhong and Joel Abraham Silberman. Their collaborative efforts have furthered the development of innovative solutions in the field.

Conclusion

Naoaki Aoki's contributions to dynamic logic circuitry and his impressive portfolio of patents highlight his role as a key innovator in the technology sector. His work continues to influence advancements in electronic components and testing methodologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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