IDiyas

For the Inventor, By the Inventor

Panchiao, Taiwan

Ming-Huei Lui

USPTO Granted Patents = 6

Average Co-Inventor Count = 3.2

ph-index = 6

Forward Citations = 153(Granted Patents)


Location History:

  • Pauchino, TW (2001)
  • Panchiao, TW (2001 - 2002)
  • Hsin-chu, TW (2002)
  • Taipei, TW (2002)
  • Sen-Kan, TW (2003)

Company Filing History:

goldMedal5 out of 40,635 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents
silverMedal1 
 
 patent
where one patent can have more than one assignee

Years Active: 2001-2003

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6 patents (USPTO):Explore Patents
1. 6647994 - Method of resist stripping over low-k dielectric material (2003-11-18),
2. 6440838 - Dual damascene structure employing laminated intermediate etch stop layer (2002-08-27),
3. 6429119 - Dual damascene process to reduce etch barrier thickness (2002-08-06),
4. 6399483 - Method for improving faceting effect in dual damascene process (2002-06-04),
5. 6323121 - Fully dry post-via-etch cleaning method for a damascene process (2001-11-27),
6. 6211061 - Dual damascene process for carbon-based low-K materials (2001-04-03),
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