Nepean, Canada

Michael Lewis Takefman

This inventor holds 32 USPTO granted patents and 7 published patent applications and 1 EPO patent, primarily in Memory System Design. Top assignees: Diablo Technologies Inc., Rambus Inc., Cisco Technology, Inc.. Active years: 1994-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Michael Lewis Takefman. Retrieved from https://idiyas.com/inventor/michael-lewis-takefman

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 32 

% Patents Active = 93.8

 

Average Co-Inventor Count = 2.6

ph-index = 8

Forward Citations = 662(Granted Patents)


Location History:

  • Ottawa, CA (1994 - 2010)
  • Nepean, CA (1998 - 2023)

Company Filing History:


Years Active: 1994-2026

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Areas of Expertise:
Memory System
Network Transceiver
Forward Error Correction
Co-Processor Interface
Multi-Threading
Load Reduction DIMM
Bandwidth Buffer
Packet Filtering
Data Encoding
Clock Sharing
Performance Monitoring
Broadcast Control
32 patents (USPTO):Explore Patents

Title: **Innovations and Contributions of Michael Lewis Takefman**

Introduction

Michael Lewis Takefman, a prolific inventor based in Nepean, Canada, holds an impressive portfolio of 29 patents. His work has significantly impacted the realm of integrated circuits and memory systems, showcasing his expertise and innovative spirit in the field of technology.

Latest Patents

Among his notable recent patents is the "Network transceiver with clock sharing between dies." This invention pertains to a multi-lane integrated circuit transceiver device that involves first and second integrated circuit dies, each containing transmit and receive block pairs equipped with digital clock generation circuitry. The innovative feature lies in its digital clock distribution circuitry, which efficiently shares a digital clock signal between the dies, optimizing performance for both transmit and receive functions across the integrated circuit.

Another significant patent is the "System and method of interfacing co-processors and input/output devices via a main memory system." This system is designed to enhance communication between a computer processing unit and various co-processors or input/output devices through an interconnected memory bus. This structure aims to streamline data processing and improve overall system efficiency.

Career Highlights

Michael has made substantial contributions while working with various esteemed organizations, including Diablo Technologies Inc. and Rambus Inc. His role in these companies has involved pushing the boundaries of technology in areas critical to modern computing and integrated circuit design.

Collaborations

Throughout his career, Michael has collaborated with talented professionals, including Maher Amer and Riccardo Badalone. Together, they have contributed to advancements in technology and the development of groundbreaking solutions that address complex challenges in the industry.

Conclusion

Michael Lewis Takefman's innovative patents and collaborations underscore his commitment to advancing technology. His work continues to influence the field of integrated circuits and memory systems, demonstrating the importance of creativity and expertise in driving progress and innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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